Difference between revisions of "LH-DH/11 Local/Distant Host Controller"

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The '''LH-DH/11 Local/Distant Host Controller''' is a [[Direct Memory Access|DMA]] [[UNIBUS]] [[1822 interface]] produced by [[Advanced Computer Communications‎|ACC]] to allow a UNIBUS machine to connect to anything that provided a BBN-1822 bit-serial interface; most commonly as [[IMP interface]]s to [[ARPANET]] [[Interface Message Processor|IMP]]s, but also to [[Packet Radio Network]] interfaces.
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The '''LH-DH/11 Local/Distant Host Controller''' was a [[Direct Memory Access|DMA]] [[UNIBUS]] [[1822 interface]] produced by [[Advanced Computer Communications‎|ACC]] to allow a UNIBUS machine to connect to anything that provided a BBN-1822 bit-serial interface; most commonly as [[IMP interface]]s to [[ARPANET]] [[Interface Message Processor|IMPs]], but also to [[Packet Radio Network]] interfaces.
  
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It consists of a 10-1/2" rack [[mounting box]] holding a pair of [[wire-wrap]]ed boards (one for [[packet]] input, and one for output), holding a number of SSI [[transistor-transistor logic|TTL]] [[integrated circuit]]s; there is also an internal [[power supply]]. Level converters allow use as either a Local Host or Distant Host 1822 interface; [[BC11A UNIBUS cable|BC11A cables]] connect it to the rest of the system.
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It consisted of a 10-1/2" rack [[mounting box]] holding a pair of [[wire-wrap]]ped boards (one for [[packet]] input, and one for output), holding a number of SSI [[transistor-transistor logic|TTL]] [[integrated circuit]]s; there was also an internal [[power supply]]. Level converters allowed use as either a Local Host or Distant Host 1822 interface; [[BC11A UNIBUS cable|BC11A cables]] connected it to the rest of the system.
  
 
==Registers==
 
==Registers==
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| colspan=16 | WC15 <---> WC00
 
| colspan=16 | WC15 <---> WC00
 
{{16bit-bitout}}
 
{{16bit-bitout}}
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==See also==
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* [[MLH-DH/LSI11 Multiple Channel Controller]] - [[QBUS]] equivalent
  
 
==External links==
 
==External links==

Latest revision as of 12:07, 4 February 2025

The LH-DH/11 Local/Distant Host Controller was a DMA UNIBUS 1822 interface produced by ACC to allow a UNIBUS machine to connect to anything that provided a BBN-1822 bit-serial interface; most commonly as IMP interfaces to ARPANET IMPs, but also to Packet Radio Network interfaces.

It consisted of a 10-1/2" rack mounting box holding a pair of wire-wrapped boards (one for packet input, and one for output), holding a number of SSI TTL integrated circuits; there was also an internal power supply. Level converters allowed use as either a Local Host or Distant Host 1822 interface; BC11A cables connected it to the rest of the system.

Registers

Register Abbreviation Address
Control & Status In Register CSRI 0767600
Data Buffer In Register DBRI 0767602
Current Word Address In Register CWAI 0767604
Word Count In Register WCI 0767606
Control & Status Out Register CSRO 0767610
Data Buffer Out Register DBRO 0767612
Current Word Address Out Register CWAO 0767614
Word Count Out Register WCO 0767616

0767600: Control & Status In Register (CSRI)

ERR NXM EOM Unused HR INR RMRE IDBF RDY IE XBA16-17 SENB HRC IRST GO
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
  • ERR - Error Flag
  • NXM - Non-Existent Memory
  • EOM - End of Message
  • HR - Host Ready
  • INR - IMP Not Ready
  • RMRE - Receive Master Ready Error
  • IDBF - Input Data Buffer Full
  • RDY - Device Ready
  • IE - Interrupt Enable
  • SENB - Store Enable
  • HRC - Host Relay Control
  • IRST - Input Interface Reset

0767602: Data Buffer In Register (DBRI)

Data15 <---> Data00
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

0767604: Current Word Address In Register (CWAI)

WA15 <---> WA00
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

0767606: Word Count In Register (WCI)

WC15 <---> WC00
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

0767610: Control & Status Out Register (CSRO)

ERR NXM WC0 Unused TMRE ODBE RDY IE XBA16-17 BBM ELB ORST GO
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
  • ERR - Error Flag
  • NXM - Non-Existent Memory
  • WC0 - Word Count = 0
  • TMRE - Transmit Master Ready Error
  • ODBE - Output Data Buffer Empty
  • RDY - Device Ready
  • IE - Interrupt Enable
  • BBM - Bus-Back Mode
  • ELB - Enable Last Bit
  • ORST - Output Interface Reset

0767612: Data Buffer Out Register (DBRO)

Data15 <---> Data00
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

0767614: Current Word Address Out Register (CWAO)

WA15 <---> WA00
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

0767616: Word Count Out Register (WCO)

WC15 <---> WC00
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

See also

External links

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