Difference between revisions of "Asynchronous serial line"
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| − | '''Asynchronous serial lines''' were the most common interface to computers for many decades; originally they connected printing terminals like the [[Teletype]], and later [[video terminal]]s such as the [[VT100]]. In general, asynchronous serial interface were bi-directional, using separate wires for | + | '''Asynchronous serial lines''' were the most common interface to computers for many decades; originally they connected printing terminals like the [[Teletype]], and later [[video terminal]]s such as the [[VT100]]. In general, asynchronous serial interface were bi-directional, using separate wires for each direction (although there are counter-examples, such as printers). |
| − | There | + | There is no separate clock or other control signal; rather, the data stream itself has synchronization information, which marks the start and end of each character. The asynchronous serial line protocol requires two signal levels: idle (mark, high), and asserted (space, low). (The polarity is a legacy from telegraphy, where the line was held high in order to show that the line was not broken, and that the transmitter was functional.) |
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| − | The asynchronous serial line protocol requires two signal levels: idle (mark, high), and asserted (space, low). (The polarity is a legacy from telegraphy, where the line was held high in order to show that the line was not broken, and that the transmitter was functional.) | ||
[[Image:AsynSerialLine.jpg|right|Transmission format]] | [[Image:AsynSerialLine.jpg|right|Transmission format]] | ||
| − | Characters are sent as sequence (see image, right) of up to four fields: a 1-bit ''start'' marker; 5-8 data bits; an optional parity bit; and a ''stop'' marker of 1 | + | Characters are sent as sequence (see image, right) of up to four fields: a 1-bit ''start'' marker; 5-8 data bits; an optional parity bit; and a ''stop'' marker of 1, 1.5 or 2 bits. The speed, data size, and parity must be externally configured into the transmitter and receiver; the stop width is set in the former. |
The line starts at idle; when a character is ready to be sent, one 'start' bit of space (confusingly, on an EIA interface, high voltage) marks the start of a character. The data is then sent, one bit at a time, least-significant-bit first. Finally, the appropriate number of 'stop' bits are sent as mark (low on an EIA interface). If no other characters are ready to be sent, the line is then left at idle (mark), otherwise the sending of the next character starts immediately, with another start bit. | The line starts at idle; when a character is ready to be sent, one 'start' bit of space (confusingly, on an EIA interface, high voltage) marks the start of a character. The data is then sent, one bit at a time, least-significant-bit first. Finally, the appropriate number of 'stop' bits are sent as mark (low on an EIA interface). If no other characters are ready to be sent, the line is then left at idle (mark), otherwise the sending of the next character starts immediately, with another start bit. | ||
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| + | There were two different common electrical interface specifications, [[20mA current loop serial line interface]], and later [[EIA RS-232 serial line interface]], but they both used the same logical interface protocol at a higher layer. EIA supported operation through [[modem]]s, but 20ma was strictly for local devices. | ||
==UARTs== | ==UARTs== | ||
The complete circuitry needed to originate and interpret serial line signals was implemented in one of the first [[MSI]] chips, the Universal Asynchronous Receiver/Transmitter (UART). The circuitry needed to produce the voltages and currents needed by the particular interface type was outside the chip, so a UART could be used with either EIA or 20mA interfaces. | The complete circuitry needed to originate and interpret serial line signals was implemented in one of the first [[MSI]] chips, the Universal Asynchronous Receiver/Transmitter (UART). The circuitry needed to produce the voltages and currents needed by the particular interface type was outside the chip, so a UART could be used with either EIA or 20mA interfaces. | ||
Revision as of 16:46, 14 January 2017
Asynchronous serial lines were the most common interface to computers for many decades; originally they connected printing terminals like the Teletype, and later video terminals such as the VT100. In general, asynchronous serial interface were bi-directional, using separate wires for each direction (although there are counter-examples, such as printers).
There is no separate clock or other control signal; rather, the data stream itself has synchronization information, which marks the start and end of each character. The asynchronous serial line protocol requires two signal levels: idle (mark, high), and asserted (space, low). (The polarity is a legacy from telegraphy, where the line was held high in order to show that the line was not broken, and that the transmitter was functional.)
Characters are sent as sequence (see image, right) of up to four fields: a 1-bit start marker; 5-8 data bits; an optional parity bit; and a stop marker of 1, 1.5 or 2 bits. The speed, data size, and parity must be externally configured into the transmitter and receiver; the stop width is set in the former.
The line starts at idle; when a character is ready to be sent, one 'start' bit of space (confusingly, on an EIA interface, high voltage) marks the start of a character. The data is then sent, one bit at a time, least-significant-bit first. Finally, the appropriate number of 'stop' bits are sent as mark (low on an EIA interface). If no other characters are ready to be sent, the line is then left at idle (mark), otherwise the sending of the next character starts immediately, with another start bit.
There were two different common electrical interface specifications, 20mA current loop serial line interface, and later EIA RS-232 serial line interface, but they both used the same logical interface protocol at a higher layer. EIA supported operation through modems, but 20ma was strictly for local devices.
UARTs
The complete circuitry needed to originate and interpret serial line signals was implemented in one of the first MSI chips, the Universal Asynchronous Receiver/Transmitter (UART). The circuitry needed to produce the voltages and currents needed by the particular interface type was outside the chip, so a UART could be used with either EIA or 20mA interfaces.
