Difference between revisions of "PDP-11/45"
From Computer History Wiki
(Changed the link) |
|||
| Line 11: | Line 11: | ||
==Documentation== | ==Documentation== | ||
| − | * EK-KB11A-MM-xxx KB11-A Central Processor Unit Maintenance Manual | + | * [http://toresbe.dreamhosters.com/redirect.php?source=bitsavers&document=dec/pdp11/1145/EK-KB11A-MM-004_Aug76.pdf EK-KB11A-MM-xxx KB11-A Central Processor Unit Maintenance Manual] |
[[Category:DEC processors]][[Category:UNIBUS processors]] | [[Category:DEC processors]][[Category:UNIBUS processors]] | ||
Revision as of 22:18, 15 May 2007
The PDP-11/45 was a fast UNIBUS PDP-11 system based on the KB11-A CPU. The PDP-11/50 and PDP-11/55 used the same processor, but featuring a MS11 MOS or bipolar MOS memory, respectively.
Optionally, the machine could be configured with an FP11 floating-point processor, and a KT11-C memory management unit.
The machine had an 18-bit UNIBUS, allowing it to address 256KiW of memory.
KB11-A CPU
The KB11-A was a high-performance CPU implemented in MSI TTL logic.
