Difference between revisions of "Systems Concepts DC-10"
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(→CONI/CONO DC0, bits: Fix bugs.) |
(→CONI/CONO DC0, bits: Split CONO/CONI.) |
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The PDP-10 I/O device covers two device codes: 610 and 614 which are conventionally named DC0 and DC1. | The PDP-10 I/O device covers two device codes: 610 and 614 which are conventionally named DC0 and DC1. | ||
| − | === CONI | + | === CONI DC0, bits === |
{{36bit-header}} | {{36bit-header}} | ||
| − | | colspan=18 | Unused || | + | | colspan=18 | Unused || PIRQC || SRQ || colspan=3 | Unused || DEEB || ERR || AEB || ATT || IENB || RUN || ACT || CEB || CHF || CFL || colspan=3 | PIA |
{{36bit-bitout}} | {{36bit-bitout}} | ||
| + | |||
| + | === CONO DC0, bits === | ||
| + | |||
| + | {{36bit-header}} | ||
| + | | colspan=18 | Unused || 1 || X || colspan=2 | Unused || DENB || ERR || ATEB || CATT || SRQ || IENB || STAR || SGL || CENB || CFLG || CPUF || colspan=3 | PIA | ||
| + | {{36bit-bitout}} | ||
| + | |||
| + | Set status bits according to mask in 22-32. | ||
| + | |||
| + | {{36bit-header}} | ||
| + | | colspan=18 | Unused || 0 || 1 || colspan=2 | Unused || DENB || ERR || ATEB || CATT || SRQ || IENB || STAR || SGL || CENB || CFLG || CPUF || colspan=3 | PIA | ||
| + | {{36bit-bitout}} | ||
| + | |||
| + | Clear status bits according to mask in 22-32. | ||
=== DATAO DC0, === | === DATAO DC0, === | ||
Revision as of 13:10, 8 July 2019
The Systems Concepts DC-10 is a PDP-10 disk controller interfacing with IBM 2314 drives.
The PDP-10 I/O device covers two device codes: 610 and 614 which are conventionally named DC0 and DC1.
CONI DC0, bits
| Unused | PIRQC | SRQ | Unused | DEEB | ERR | AEB | ATT | IENB | RUN | ACT | CEB | CHF | CFL | PIA | |||||||||||||||||||||
| 00 | 01 | 02 | 03 | 04 | 05 | 06 | 07 | 08 | 09 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 |
CONO DC0, bits
| Unused | 1 | X | Unused | DENB | ERR | ATEB | CATT | SRQ | IENB | STAR | SGL | CENB | CFLG | CPUF | PIA | ||||||||||||||||||||
| 00 | 01 | 02 | 03 | 04 | 05 | 06 | 07 | 08 | 09 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 |
Set status bits according to mask in 22-32.
| Unused | 0 | 1 | Unused | DENB | ERR | ATEB | CATT | SRQ | IENB | STAR | SGL | CENB | CFLG | CPUF | PIA | ||||||||||||||||||||
| 00 | 01 | 02 | 03 | 04 | 05 | 06 | 07 | 08 | 09 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 |
Clear status bits according to mask in 22-32.
DATAO DC0,
Writes a channel instruction to be executed immediately.
CONO DC1, bits
| Unused | TMDN | ||||||||||||||||||||||||||||||||||
| 00 | 01 | 02 | 03 | 04 | 05 | 06 | 07 | 08 | 09 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 |
CONI DC1, bits
| Unused | ATDN | TMDN | LAT | Unused | DIPE | RLNER | RCER | OVRRN | CKSER | WTHER | FUNSF | OFFL | PROT | DOBSY | NXM | CPERR | |||||||||||||||||||
| 00 | 01 | 02 | 03 | 04 | 05 | 06 | 07 | 08 | 09 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 |
