Difference between revisions of "Shift register"
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Latest revision as of 19:43, 4 August 2021
A shift register is a logic element consisting of a number of storage elements (usually latches) arranged in a linear array; information, once in the array, can then be shifted (hence the name) along it. The array has two interfaces; input and output. Either can be parallel (which allows the entire array to be loaded at once), or serial, with information being entered or removed at one end of the array. The choice of input and output means will depend on the purpose of the shift register. For instance, a shift register in a CPU, used for arithmetic purposes, would typically be both loaded and read in parallel.
Another common use of a shift register is to take data being sent between two subsystems in serial form, using a single conductor (down which information is sent a bit at a time), and transforming it into a parallel form for use; this will require a shift register with serial input and parallel output. The reverse transformation, allowing information to be sent out of a subsystem over a single serial link, is also seen. In the early days of computers, when logic was extremely expensive, the additional cost of multiple conductors (for parallel transmission) could avoid the need for extra logic (and also yielded higher performance); now, when gates are essentially free, minimizing the number of connections is more important.