ANTS/ISI IMP Interface

The ANTS IMP Interface and ISI IMP Interface were two mostly-program compatible IMP interfaces, the former produced as part of the ARPA Network Terminal System project, the latter at ISI.

Little is currently known of their physical implementation, and in particular if they shared a logic design, or just their programming interface specification. They provided an 1822 interface for the UNIBUS which used DMA to transfer data to/from main memory.

Differences

The ANTS and ISI versions have only minor differences:

• The register which specifies the extent of a transfer; the ANTS one gives the ending address, the ISI one gives the transfer size
• The ISI one has two extra bits of transfer memory address; without those, the ANTS one is restricted to using buffers in the lowest 64KB of memory

Registers

Register	Abbreviation	Address
Input Start Pointer Register	IMPSPI	0764000
Input End Pointer/Byte Count Register	IMPEPI/IMPBCI	0764002
Input Status Register 1	IMPS1I	0764004
Input Status Register 2	IMPS2I	0764006
Output Start Pointer Register	IMPSPO	0764010
Output End Pointer/Byte Count Register	IMPEPO/IMPBCO	0764012
Output Status Register 1	IMPS1O	0764014
Output Status Register 2	IMPS2O	0764016

0764000: Input Start Pointer Register (IMPSPI)

SP15 <---> SP00
15	14	13	12	11	10	09	08	07	06	05	04	03	02	01	00

0764002: Input End Pointer (IMPEPI) ANTS

EP15 <---> EP00
15	14	13	12	11	10	09	08	07	06	05	04	03	02	01	00

0764002: Input Byte Count Register (IMPBCI) ISI

BC15 <---> BC00
15	14	13	12	11	10	09	08	07	06	05	04	03	02	01	00

0764004: Input Status Register 1 (IMPS1I)

IMPERR	NEXMEM	Unused	BCEQ0	BUSY	Unused		ENDMSG	BUFULL	INTENA	Unused	NOSWAP	Unused	MEMEX		Unused
15	14	13	12	11	10	09	08	07	06	05	04	03	02	01	00

• IMPERR - IMP error
• NEXMEM - Non-existent memory
• BCEQ0 - Byte count=0
• ENDMSG - End of message
• BUFULL - Buffer full
• INTENA - Interrupt enable
• NOSWAP - Suppress byte swapping
• MEMEX - Memory address extension (ISI only)

0764006: Input Status Register 2 (IMPS2I)

Unused					TSTINC	LOCK	LOOP	IMPRDY	Unused						SCOSYN
15	14	13	12	11	10	09	08	07	06	05	04	03	02	01	00

• TSTINC - Test increment
• LOCK - Lock interface (don't start when EPI/BCI is loaded)
• LOOP - Loop output to input
• IMPRDY - IMP master ready
• SCOSYN - Scope sync

0764000: Output Start Pointer Register (IMPSPO)

SP15 <---> SP00
15	14	13	12	11	10	09	08	07	06	05	04	03	02	01	00

0764002: Output End Pointer (IMPEPO) ANTS

EP15 <---> EP00
15	14	13	12	11	10	09	08	07	06	05	04	03	02	01	00

0764002: Output Byte Count Register (IMPBCO) ISI

BC15 <---> BC00
15	14	13	12	11	10	09	08	07	06	05	04	03	02	01	00

0764004: Output Status Register 1 (IMPS1O)

Unused	NEXMEM	Unused	BCEQ0	BUSY	Unused			DONE	INTENA	Unused	NOSWAP	Unused	MEMEX		DISEOM
15	14	13	12	11	10	09	08	07	06	05	04	03	02	01	00

• NEXMEM - Non-existent memory
• BCEQ0 - Byte count=0
• INTENA - Interrupt enable
• NOSWAP - Suppress byte swapping
• MEMEX - Memory address extension (ISI only)
• DISEOM - Disable end of message

0764006: Output Status Register 2 (IMPS2O)

Unused							IRESET	Unused							HOSRDY
15	14	13	12	11	10	09	08	07	06	05	04	03	02	01	00

• IRESET - Interface reset
• HOSRDY - Host master ready

External links

• ucbmac.m11 - ELF macro definitions, including registers
• elfnio.o11 - ELF device driver