Difference between revisions of "Wired-OR"
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Latest revision as of 01:27, 21 February 2022
Wired-OR refers to a common technique which uses no active devices to perform the logic function; it wires together the outputs of multiple open collector gates to do it, using negative logic.
It connects together the outputs of the gates which produce the signals which are to be ORed together; a pull-up resistor to the supply voltage completes the 'gate'. Since TTL gates produce low outputs by sinking current to ground (drawing it into the gate through the output, seemingly paradoxically), any of the gates in the wired-OR can force the output low by turning on.
Similarly, this technique allows the creation of so-called wired-AND in positive logic; if any of the inputs to the 'AND' is low, it force the output low - i.e. a logical AND.