Difference between revisions of "Synchronous Data Link Control"
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Revision as of 18:18, 28 May 2022
Synchronous Data Link Control (usually abbreviated to SDLC) is a protocol used to transmit packets over synchronous serial lines. It can operate over both half-duplex and full-duplex links; supported configurations include both point-point and multi-point. The later protocol HDLC is based on SDLC.
SDLC sends 8-bit bytes only. The start and end of the packet (named a 'frame' in SDLC terminology) are marked by a specific bit pattern, '01111110', the 'flag'. Instances of that pattern in the user data are obscured by bit stuffing - '11111' is replaced, during transmission, by '111110'; the inserted '0' is removed on reception.
If the link does not provide an independent received clock, SDLC uses NRZI encoding, to ensure that enough transitions are present to keep the clock synchronized. With NRZI, the bit stuffing used when the data contains long runs of '1' bits provides enough transitions.
An SDLC frame contains these fields:
- Flag - 8 bits
- Address - 8 bits
- Control - 8 bits
- Data - Variable number of 8-bit bytes
- Checksum - 16 bits
The checksum covers the address, control and data fields. The frame is followed either by i) another frame, or ii) the idle pattern - back-to-back flags (with the trailing '0' bit of one flag overlaid with the starting '0' bit of the next flag).
