Difference between revisions of "Power 6/32"
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==Details== | ==Details== | ||
− | The Power 6/32 [[CPU]] was implemented in [[transistor-transistor logic|TTL]]; it had a [[clock rate]] of 100nS. | + | The Power 6/32 [[Central Processing Unit|CPU]] was implemented in [[transistor-transistor logic|TTL]]; it had a [[clock rate]] of 100nS. |
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+ | All that I can find out about them is this table from dhrystone.c (below): | ||
<pre> | <pre> | ||
*----------------DHRYSTONE VERSION 1.0 RESULTS BEGIN-------------------------- | *----------------DHRYSTONE VERSION 1.0 RESULTS BEGIN-------------------------- | ||
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==Instruction Set== | ==Instruction Set== | ||
− | We can infer a lot from the 4. | + | We can infer a lot from the [[4.3 BSD Tahoe]] file 'instrs' (below): |
− | * The CPU has sixteen 32-bit registers r0 ... r13 (fp), r14 (sp), r15 (pc). | + | * The CPU has sixteen 32-bit registers r0 ... r13 ([[stack frame|fp]]), r14 ([[Stack Pointer|sp]]), r15 ([[Program Counter|pc]]). |
* The opcode map and mnemonics for the assembler are as follows: | * The opcode map and mnemonics for the assembler are as follows: | ||
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* [https://virtuallyfun.com/wp-content/uploads/2017/02/Harris-HCX-9-print-ad.jpg Harris HCX-9] - ad | * [https://virtuallyfun.com/wp-content/uploads/2017/02/Harris-HCX-9-print-ad.jpg Harris HCX-9] - ad | ||
* [https://virtuallyfun.com/2017/02/24/the-harris-hcx-9-aka-tahoe-platform/ The Harris HCX-9 aka TAHOE platform] | * [https://virtuallyfun.com/2017/02/24/the-harris-hcx-9-aka-tahoe-platform/ The Harris HCX-9 aka TAHOE platform] | ||
+ | * [https://www.tuhs.org/cgi-bin/utree.pl?file=4.3BSD-Tahoe/usr/src/bin/as/as.tahoe/instrs instrs] - basic table | ||
+ | ** [https://www.tuhs.org/cgi-bin/utree.pl?file=4.3BSD-Tahoe/usr/src/bin/adb/adb.tahoe/instrs instrs] - alphabetical list | ||
+ | * [https://web.archive.org/web/20150123191735/http://www.dunnington.u-net.com/public/dhrystone.c dhrystone.c] | ||
* Cook, Carpenter, Catmull 1987 "The Reyes Image Rendering Architecture" in ACM ''Computer Graphics'' Vol. 21, No. 4 [http://dl.acm.org/citation.cfm?id=37414 PDF] indicating this machine was used at Pixar for a number of films | * Cook, Carpenter, Catmull 1987 "The Reyes Image Rendering Architecture" in ACM ''Computer Graphics'' Vol. 21, No. 4 [http://dl.acm.org/citation.cfm?id=37414 PDF] indicating this machine was used at Pixar for a number of films | ||
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[[Category: Superminis]] | [[Category: Superminis]] |
Revision as of 13:12, 20 December 2024
The Power 6/32, code named Tahoe, from Computer Consoles Incorporated, was the CPU for a supermini; the CSRG ported 4.3 BSD to it, in the '4.3 BSD Tahoe' release.
Although it was not very successful commercially (in part because CCI exited the computer business shortly after it was released), it was very influential as the first non-VAX machine that BSD UNIX was ported to. The Tahoe did help separate out a lot of VAX-specific code from the base, allowing BSD to become more portable, but the Power 6/32 machine quickly disappeared off the market, and not much is known about them.
It was re-sold (under other names) by several vendors: Unisys sold the 6/32 under the name 'Unisys 7000/40', using their own bastardized BSD+SYSV Unix. (Kuwait Petroleum in Denmark had one of them.) ICL had the 'Clan 7'. Harris had the HCX-5, -7, and -9 models (for which a bit survives - below), running the SysV derivative HCX/UX.
Pixar used a Power 6/32 to render the stained-glass knight in the 1985 movie Young Sherlock Holmes.
Details
The Power 6/32 CPU was implemented in TTL; it had a clock rate of 100nS.
All that I can find out about them is this table from dhrystone.c (below):
*----------------DHRYSTONE VERSION 1.0 RESULTS BEGIN-------------------------- * * MACHINE MICROPROCESSOR OPERATING COMPILER DHRYSTONES/SEC. * TYPE SYSTEM NO REG REGS * -------------------------- ------------ ----------- --------------- * CCI POWER 6/32 COS(SV+4.2) cc 7500 7800 * CCI POWER 6/32 POWER 6 UNIX/V cc 8236 8498 * CCI POWER 6/32 4.2 Rel. 1.2b cc 8963 9544 * VAX 11/780 - UNIX 5.2 cc 1515 1562 * VAX 11/780 - UNIX 4.3bsd cc 1646 1662
Which may give some indication on the initial reasons why the Power 6/32 was chosen as the successor to the VAX by CSRG.
Instruction Set
We can infer a lot from the 4.3 BSD Tahoe file 'instrs' (below):
- The CPU has sixteen 32-bit registers r0 ... r13 (fp), r14 (sp), r15 (pc).
- The opcode map and mnemonics for the assembler are as follows:
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | a | b | c | d | e | f | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0x00 | halt | - | - | - | - | sinf | ldf | ldd | addb2 | movb | addw2 | movw | addl2 | movl | bbs | - |
0x10 | nop | brb | - | brw | - | cosf | lnf | lnd | addb3 | cmpb | addw3 | cmpw | addl3 | cmpl | bbc | - |
0x20 | rei | bneq/bnequ | - | cvtwl | - | atanf | stf | std | subb2 | mcomb | subw2 | mcomw | subl2 | mcoml | emul | aoblss |
0x30 | bpt | beql/beqlu | - | cvtwb | - | logf | cmpf | cmpd | subb3 | bitb | subw3 | bitw | subl3 | bitl | ediv | aobleq |
0x40 | ret | bgtr | - | - | - | sqrtf | cmpf2 | cmpd2 | shll | clrb | shlq | clrw | mull2 | clrl | shal | - |
0x50 | - | bleq | - | - | - | expf | tstf | tstd | shrl | tstb | shrq | tstw | mull3 | tstl | shar | bbssi |
0x60 | ldpctx | - | - | - | - | - | - | pushd | - | incb | - | incw | divl2 | incl | - | cvtlb |
0x70 | svpctx | jmp | - | - | - | - | cvlf | cvld | - | decb | - | decw | divl3 | decl | - | cvtlw |
0x80 | - | bgeq | movs2 | - | - | - | cvfl | cvdl | orb2 | cvtbl | orw2 | bispsw | orl2 | adwc | adda | - |
0x90 | - | blss | cmps2 | - | - | - | - | ldfd | orb3 | cvtbw | orw3 | bicpsw | orl3 | sbwc | suba | - |
0xa0 | - | bgtru | - | - | - | - | cvdf | - | andb2 | movzbl | andw2 | loadr | andl2 | mtpr | ffs | - |
0xb0 | - | blequ | - | - | - | - | negf | negd | andb3 | movzbw | andw3 | storer | andl3 | mfpr | ffc | calls |
0xc0 | prober | bvc | movs3 | movzwl | - | - | addf | addd | xorb2 | movob | xorw2 | movow | xorl2 | movpsl | btcs | kcall |
0xd0 | probew | bvs | cmps3 | - | - | - | subf | subd | xorb3 | pushb | xorw3 | pushw | xorl3 | pushl | - | - |
0xe0 | insque | bgequ/bcs | - | - | - | - | mulf | muld | mnegb | movab | mnegw | movaw | mnegl | moval | - | - |
0xf0 | remque | bcc/blssu | - | - | - | - | divf | divd | movblk | pushab | - | pushaw | casel | pushal | callf | - |
See also
External links
- Harris HCX-5 - ad
- Harris HCX-9 - ad
- The Harris HCX-9 aka TAHOE platform
- instrs - basic table
- instrs - alphabetical list
- dhrystone.c
- Cook, Carpenter, Catmull 1987 "The Reyes Image Rendering Architecture" in ACM Computer Graphics Vol. 21, No. 4 PDF indicating this machine was used at Pixar for a number of films