Difference between revisions of "SDS 930"
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The memory was available in bank sizes of 4KW, 8KW and 16KW; the basic system could hold up to two banks, up to a maximum of 32KW. Use of more than 16KW required optional [[bank switching]] hardware. The basic configuration included multiply and divide in [[hardware]], but no [[floating point]] in hardware (although there are [[instruction]]s to support it, such as [[normalization]], etc). <!-- an optional hardware floating point unit, the 'correlation and filtering unit' (CFE) may have been added later - as of Nov 69, fp was in software --> | The memory was available in bank sizes of 4KW, 8KW and 16KW; the basic system could hold up to two banks, up to a maximum of 32KW. Use of more than 16KW required optional [[bank switching]] hardware. The basic configuration included multiply and divide in [[hardware]], but no [[floating point]] in hardware (although there are [[instruction]]s to support it, such as [[normalization]], etc). <!-- an optional hardware floating point unit, the 'correlation and filtering unit' (CFE) may have been added later - as of Nov 69, fp was in software --> | ||
− | A 930 was upgraded with [[memory management]] hardware (including [[virtual memory]]) by [[Project Genie]] at UC Berkeley, to allow it to be used for creating the [[Berkeley | + | ==Upgrade to prototype 940== |
+ | |||
+ | A 930 was upgraded with [[memory management]] hardware (including [[virtual memory]]) by [[Project Genie]] at UC Berkeley, to allow it to be used for creating the [[Berkeley Time-Sharing System]]; that machine was effectively the prototype of the later [[SDS 940]]. The changes to that 930 were: | ||
+ | |||
+ | * Addition of two additional operating modes for the [[CPU]], "user" and "monitor" (or "executive") to the base "normal" mode (in which the machine operated ''almost'' exactly as a normal 930); the machine started in normal mode (the ''only'' way to enter normal mode), and a special [[instruction]] (the only visible 'non-normality' in normal mode) could switch to monitor mode. | ||
+ | ** Once in user mode, only a 'SYSPOP' (below), a [[trap]], or an [[interrupt]] could transition back to monitor mode. | ||
+ | * [[Instruction]]s were divided into two classes, ordinary and "privileged" (such as [[halt]] and [[input/output|I/O]] instructions); "An attempt to execute a privileged instruction while in user mode will result in the execution of a [[no-op|NOP]] instruction and, subsequently, a trap". | ||
+ | ** Some reserved instructions were used by the system as 'system programmed operators' (SYSPOPs). (Half of the SYSPOPs were allocated to the user, and half to the system.) | ||
+ | * The user's [[address space]] was divided into 8 [[segment]]s (each 2K [[word]]s long), each of which could be disabled, or independently [[relocation|relocated]] to any location in [[main memory]] (either for normal read/write access, or read-only). | ||
+ | ** In monitor mode, instructions with the sign bit (normally unused) set used instead user address mapping for that instruction. | ||
+ | |||
+ | In other words, much the same changes as were made to other machines in that era to allow [[time-sharing]] at the [[object code]] level. | ||
{{semi-stub}} | {{semi-stub}} |
Latest revision as of 14:15, 17 September 2025
The SDS 930 (renamed to XDS 930 after SDS was purchased by Xerox and renamed 'XDS') was a mainframe with a 24-bit word length (with an extra bit for parity). It was constructed out of bipolar discrete transistors, and used core memory.
The memory was available in bank sizes of 4KW, 8KW and 16KW; the basic system could hold up to two banks, up to a maximum of 32KW. Use of more than 16KW required optional bank switching hardware. The basic configuration included multiply and divide in hardware, but no floating point in hardware (although there are instructions to support it, such as normalization, etc).
Upgrade to prototype 940
A 930 was upgraded with memory management hardware (including virtual memory) by Project Genie at UC Berkeley, to allow it to be used for creating the Berkeley Time-Sharing System; that machine was effectively the prototype of the later SDS 940. The changes to that 930 were:
- Addition of two additional operating modes for the CPU, "user" and "monitor" (or "executive") to the base "normal" mode (in which the machine operated almost exactly as a normal 930); the machine started in normal mode (the only way to enter normal mode), and a special instruction (the only visible 'non-normality' in normal mode) could switch to monitor mode.
- Instructions were divided into two classes, ordinary and "privileged" (such as halt and I/O instructions); "An attempt to execute a privileged instruction while in user mode will result in the execution of a NOP instruction and, subsequently, a trap".
- Some reserved instructions were used by the system as 'system programmed operators' (SYSPOPs). (Half of the SYSPOPs were allocated to the user, and half to the system.)
- The user's address space was divided into 8 segments (each 2K words long), each of which could be disabled, or independently relocated to any location in main memory (either for normal read/write access, or read-only).
- In monitor mode, instructions with the sign bit (normally unused) set used instead user address mapping for that instruction.
In other words, much the same changes as were made to other machines in that era to allow time-sharing at the object code level.
External links
- SDS 930 - documentation at Bitsavers
- SDS 9xx - programs
- Modifications to the SDS 930 Computer for the Implementation of Time-Sharing