KEF11-B CIS chip

From Computer History Wiki
Revision as of 17:57, 30 May 2021 by Jnc (talk | contribs) (+link DIP)
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search
KEF11-B chip

The KEF11-B CIS chip is an option for some PDP-11 CPU boards which use the F-11 chip set; it implements the PDP-11 Commercial Instruction Set.

It consists of six chips containing additional microcode, on a large dual DIP carrier. Due to its large physical size, not all the KDF11 CPUs can use it and the KEF11-A floating point chip at the same time; the KDF11-A CPU is too small to hold them both simultaneously.