VMEbus

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The VMEbus (there is no official expansion of the acronym, but it is widely considered to mean 'VERSA Module Eurocard') bus, initially developed starting in 1981, is the most popular 16/32-bit multi-vendor backplane bus; it was standardized by the IEC as ANSI/IEEE 1014-1987. Initially, it was used for many minicomputers, and other specialist computer systems (especially real-time systems such as data acquisition systems); it continues to see wide use today in that area. (Improvements have been introduced over time, but they are generally both forward as well as backward compatible.)

For its mechanical form factor, it used the Eurocard system (sizes, insertion mechanicals etc); electrically (since Eurocard does not define anything electrical), it was strongly based on the Motorola-created VERSAbus, developed in the late 1970s. Physically, unlike the VERSAbus, which used etch fingers on one edge of the card (to make electrical contact with the bus), the VMEbus used DIN 41612 pin and shell connectors; these are more resilient to mechanical wear.

Like the VERSAbus, the VMEbus uses separate data and address buses, each 32-bits wide. To accommodate both full-width buses, the VMEbus from the start used two separate Eurocard connectors, P1 and P2. The former connector has five rows of pins (now; three originally); the VMEbus uses three rows, of 32 pins each. These contains all of the control signals, along with the lower 24 bits of the address, and 16 bits of the data. (With this allocation, cost-reduced low-end systems could include a P1 connector only.) The P2 contains one more row of pins used by the VMEbus, which carry the remaining 8 address and 16 data line; the remaining pins on this connector are user defined.

'Master' and 'slave' modules are involved in data transfer operations; on the VMEbus all data transfers are effectively DMA. Like the VERSAbus, the VMEbus can do block transfers of data. 'Interrupters' send interrupts, and 'interrupt handlers' receive and handle them. (The VMEbus supports 7 levels of interrupt priority.) All use of the bus is controlled by an arbitration unit, housed in slot 1 of the chassis. Communication between entities on the bus, to effect allocation of the bus, uses a set of nine lines, known as the arbitration bus. Series-wired bus grant lines are used to transfer control of the bus; this means that interrupters must be designed to deal with meta-stability issues.

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