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• VAX 7000 series
  ...ached to the LSB. The IOP was an adaptor which provided up to 4 [[Extended Memory Interconnect|XMI]] buses, and also up to 6 [[VAX Bus Interconnect|VAXBI]] b All could be configured with two 2GB memory boards, but in this case only 3.5GB would actually be used by [[OpenVMS]] (
  2 KB (301 words) - 15:30, 23 May 2024
• Honeywell 6000 series
  ...t [[word]]s, and almost identical [[instruction set]]s; Honeywell added an Extended Instruction Set (EIS) which provided string-manipulation instructions, [[bi ...pending Unit' (APU) - needed to implement the [[segment]]ed [[single-level memory]] used by Multics, which ran only on those models of the GE 600 and Honeywe
  12 KB (1,837 words) - 19:24, 3 January 2024
• PDP-9
  | virtual address = 13 bits (direct), 15 bits (extended) | memory speed = 1 μsec (9) or 1.5 μsec (9/L)
  6 KB (801 words) - 22:14, 9 February 2024
• Compatible Time-Sharing System
  During 1962 and 1963, the system was improved and extended, and finally entered full service in the summer of 1963. [[Project MAC]] ac * memory boundary and relocation registers
  6 KB (1,011 words) - 16:53, 7 March 2024
• TC11 DECtape controller
  Extended single height boards: Extended double height boards:
  5 KB (717 words) - 01:33, 1 March 2023
• KD11-A CPU
  ...he [[PDP-11 Extended Instruction Set|EIS]] was optional, with the [[KE11-E Extended Instruction Set]], a hex card. There was also optional [[floating point]] h ...-D Memory Management]], another hex card; it too was not the full [[PDP-11 Memory Management]], but the simplified subset. Other CPU options included the [[K
  4 KB (588 words) - 05:52, 8 April 2024
• Able ENABLE
  ...]'s ([[PDP-11/34]] through [[PDP-11/45]]) to have up to 4 MBytes of [[main memory]]. ...ess]]es on a separate [[Extended UNIBUS]]; the latter could hold stock EUB memory cards, up to the 4MB standard on the EUB.
  9 KB (1,569 words) - 15:47, 6 February 2024
• PDP-5
  | physical address = 15 bits (with Memory Extension Control; 32K words) | virtual address = 12 bits (direct), 15 bits (extended)
  2 KB (360 words) - 20:03, 7 February 2024
• MOS operating system
  ...ssages ('signals'), asynchronous I/O, and allocation and freeing of [[main memory]]; it had no [[file system]] or other support for [[secondary storage]]. All were somewhat extended from the original; the first two fairly extensively, the latter only to mak
  3 KB (394 words) - 16:36, 25 January 2024
• RX211 floppy disk controller
  ...th use [[Direct Memory Access|DMA]] to transfer information between [[main memory]] and the floppy. | Error || Initialize || colspan=2 | Extended Address || RX02 || colspan=2 | Unused || Density || Transfer Request || Int
  4 KB (536 words) - 15:06, 6 November 2022
• Xerox Alto
  ...which plugged into a common [[backplane]], along with four PCBs for [[main memory]] (in a 64KW [[address space]] of 16-bit [[word]]s), and those for [[device ...nd eventually also 1KW of writeable [[Random Access Memory|RAM]] microcode memory. (The basic ROM microcode more or less emulated a [[Data General]] [[Nova]]
  6 KB (863 words) - 22:39, 3 October 2023
• KE11-E Extended Instruction Set
  The '''KE11-E Extended Instruction Set''' is the optional [[PDP-11 Extended Instruction Set]] for the [[KD11-A CPU]] of the [[PDP-11/40]]; it implement The KE11-E includes its own microcode [[Read-only memory|ROM]], which produces an additional 24 bits width of microcode (to control
  2 KB (304 words) - 02:33, 12 October 2022
• KD11-Z CPU
  ...[UNIBUS map]] which connected the two, and mapped UNIBUS addresses to main memory addresses. Full [[PDP-11 Memory Management]] and a [[cache]] (the [[KK11-B Cache Memory|KK11-B]]) were standard on all KD11-Z's. It also supported the optional [[F
  4 KB (668 words) - 15:59, 6 February 2024
• MS11
  '''MS11''' refers to a number of different [[semiconductor]] [[main memory]] systems for [[UNIBUS]] [[PDP-11]]s: * MS11-A, -B and -C [[MS11 Semiconductor Memory System]]s
  707 bytes (111 words) - 21:10, 2 July 2023
• MS11-L MOS memory
  ...UNIBUS [[address space]]. It had a [[jumper]] option to enable use on an [[Extended UNIBUS]]. Configuration is by [[Dual Inline Package|DIP]] switches. It used The [[access time]] is 385 nsec (typical; 1025 nsec maximum on [[memory refresh]] conflict), and the [[cycle time]] is 510 nsec (1050 nsec maximum
  2 KB (346 words) - 21:15, 21 September 2022
• MM11-E and MM1-F core memories
  The '''MM11-E''' and '''MM11-F core memories''' were [[UNIBUS]] [[main memory]] units; the first UNIBUS memories produced by [[Digital Equipment Corporat ...[[parity]] version available, the '''MM11-FP''' (which used a 4Kx18 [[core memory|core plane]], instead of the 4Kx16 used in the MM11-E and MM11-F).
  4 KB (667 words) - 19:53, 30 July 2023
• MS11-P MOS memory
  ...ded UNIBUS]] [[Metal Oxide Semiconductor|MOS]] [[Dynamic RAM|DRAM]] [[main memory]] card. As an EUB card, it can therefore ''only'' be plugged into the EUB s ...system is frozen (via negation of the ACLO UNIBUS signal) while the entire memory is cleared, to prevent spurious ECC errors. For [[diagnostic]] purposes, th
  2 KB (345 words) - 17:10, 18 August 2023
• PDP-8/A
  | memory speed = 2.3 µseconds | memory mgmt = bank selection, CPU mode
  2 KB (332 words) - 14:11, 14 July 2023
• PDP-8/L
  | memory speed = 1.6 µseconds | memory mgmt = none
  2 KB (298 words) - 14:11, 14 July 2023
• CDC 6600
  | memory speed = 1 µsecond ([[cycle time]]) | memory mgmt = [[base and bounds]]
  6 KB (789 words) - 17:26, 22 January 2024

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