The RF11 controller from DEC for the UNIBUS is an early secondary storage controller for the PDP-11. It can interface with up to eight RS11 fixed-head disk drives; each has a capacity of 512 Kbytes of storage.
Unlike all other DEC disk controllers, the RF11 can read or write individual words; this was itended to allow optimal use of both disk space and main memory (e.g. during swapping).
Like many of the early large peripheral controllers for the PDP-11, it was a large custom wire-wrapped backplane which bolted into the front of a 19 inch rack, such as an H960; into it plugged about 40 small M-Series FLIP CHIPs.
Device registers
| Register |
Abbreviation |
Address
|
| Disk Control Status Register |
DCS |
777460
|
| Word Count Register |
WC |
777462
|
| Current Memory Address |
CMA |
777464
|
| Disk Address Register |
DAR |
777466
|
| Disk Address Extension Error Register |
DAE |
777470
|
| Data Buffer Register |
DBR |
777472
|
| Maintenance Register |
MA |
777474
|
| Address of Disk Segment Register |
ADS |
777476
|
777460: Disk Control Status Register (DCS)
| Error |
Freeze |
Write Check |
Data Parity |
NXD |
Write Lockout |
Missed Xfer |
Disk Clear |
Control Ready |
Interrupt Enable |
Ext Mem |
Maintenance |
Function Register |
Go
|
| 15
|
14
|
13
|
12
|
11
|
10
|
09
|
08
|
07
|
06
|
05
|
04
|
03
|
02
|
01
|
00
|
777462: Word Count Register (WC)
| WC15 <---> WC00
|
| 15
|
14
|
13
|
12
|
11
|
10
|
09
|
08
|
07
|
06
|
05
|
04
|
03
|
02
|
01
|
00
|
777464: Current Memory Address Register (CMA)
| BA15 <---> BA01 |
Unused
|
| 15
|
14
|
13
|
12
|
11
|
10
|
09
|
08
|
07
|
06
|
05
|
04
|
03
|
02
|
01
|
00
|
777466: Disk Address Register (DAR)
| Track Address |
Word Address
|
| 15
|
14
|
13
|
12
|
11
|
10
|
09
|
08
|
07
|
06
|
05
|
04
|
03
|
02
|
01
|
00
|
777470: Disk Address Extension Error Register (DAR)
| Address Parity |
Timing Track Error |
Unused |
NXM |
Unused |
Current Memory |
Data Req Late |
Unused |
Disk Addr Ovflo |
Disk Address |
Track Address
|
| 15
|
14
|
13
|
12
|
11
|
10
|
09
|
08
|
07
|
06
|
05
|
04
|
03
|
02
|
01
|
00
|
The low five bits of this register are actually an extension to the Disk Address Register (above).
777472: Data Buffer Register (DBR)
| DB15 <---> DB00
|
| 15
|
14
|
13
|
12
|
11
|
10
|
09
|
08
|
07
|
06
|
05
|
04
|
03
|
02
|
01
|
00
|
777474: Maintenance Register (MA)
| Unused |
Data |
Timing |
Unused |
Data Track |
Timing C |
Timing B |
Timing A
|
| 15
|
14
|
13
|
12
|
11
|
10
|
09
|
08
|
07
|
06
|
05
|
04
|
03
|
02
|
01
|
00
|
777476: Address of Disk Segment Register (ADS)
| Unused |
Disk Segment Address
|
| 15
|
14
|
13
|
12
|
11
|
10
|
09
|
08
|
07
|
06
|
05
|
04
|
03
|
02
|
01
|
00
|
