Talk:Intel 4004

Word size

Per the data sheet, it's actually sort of an 8-bit computer:

• Instructions are all multiples of 8 bits long
• Instruction addresses (in jumps, etc) are 8 bits long
• Immediate data is sometimes 8 bits wide
• Register pairs, the target of 'load immediate' instructions, are 8 bits wide
• Some data is 8 bits wide (in the FIN instruction, the data goes to a register pair, so 8 bits wide)

On the other hand:

• The accumulator is only 4 bits wide
• The ALU (and thus all data handling in arithmetic instructions) is only 4 bits wide
• Some data is 4 bits wide (it's not clear if in the LDM instruction, the 'DDDD' bits are immediate data, or the address of the data [probably immediate]; either way, it goes to the accumulator, so only 4 bits wide)

So, it's truly half and half. Because instructions and addresses are 8 bits long, I would say its word size is 8 bits. But I can see an argument for saying it's a 4-bit machine. Addresses on the early PDP-10's are only 18 bits, so address length is not definitive to word size. Similarly, the PDP-10's full support for half-word math is sort of irrelevant. The two conclusive things in 'word size' seem to be i) instruction size, and ii) ALU size (which defines the longest data item it can handle in hardware). But that last isn't absolutely definitive - PDP-11's with hardware floating point handle multi-word data. And the UNIVAC I has a word size of 72 bits, with two instructions per word! I give up!!

Interestingly, it seems to have limited support for off-chip RAM; the 16 4-bit-wide internal registers seem to be the primary locations for writing data; there's no 'store' instruction. But SRC seems to send an address out, for later used by the Wxx instructions. And the CM-RAM[1023] lines seem to control "4002 RAM chips". Jnc (talk) 20:58, 11 July 2023 (CEST)