Talk:Intel 4004

Word size

Per the data sheet, it's actually sort of an 8-bit computer:

• Instructions are all multiples of 8 bits long
• Instruction addresses (in jumps, etc) are 8 bits long
• Immediate data is sometimes 8 bits wide
• Register pairs, the target of 'load immediate' instructions, are 8 bits wide
• Some data is 8 bits wide (in the FIN instruction, the data goes to a register pair, so 8 bits wide)

On the other hand:

• The accumulator is only 4 bits wide
• The ALU (and thus all data handling in arithmetic instructions) is only 4 bits wide
• Some data is 4 bits wide (it's not clear if in the LDM instruction, the 'DDDD' bits are immediate data, or the address of the data [probably immediate]; either way, it goes to the accumulator, so only 4 bits wide)

So, it's truly half and half. Because instructions and addresses are 8 bits long, I would say its word size is 8 bits. But I can see an argument for saying it's a 4-bit machine. Addresses on the early PDP-10's are only 18 bits, so address length is not definitive to word size. Similarly, the PDP-10's full support for half-word math is sort of irrelevant. The two conclusive things in 'word size' seem to be i) instruction size, and ii) ALU size (which defines the longest data item it can handle in hardware). But that last isn't absolutely definitive - PDP-11's with hardware floating point handle multi-word data. And the UNIVAC I has a word size of 72 bits, with two instructions per word! I give up!!

Interestingly, it seems to have limited support for off-chip RAM; the 16 4-bit-wide internal registers seem to be the primary locations for writing data; there's no 'store' instruction. But SRC seems to send an address out, for later used by the Wxx instructions. And the CM-RAM[1023] lines seem to control "4002 RAM chips". Jnc (talk) 20:58, 11 July 2023 (CEST)

I don't think there's any exact definition of the "bit widthness" of a processor. And maybe that's just as well, as people would never be able to agree on one. And obviously many processors will defy a neat classification.

Maybe we all have a hierarchy of features we'd like to consider in order to assign a number. I'm my view, instruction width isn't at the top of my list. Address space width even less soo, e.g. consider "8-bit" processors usually have a 16-bit address space. I think the ALU and register size the the most important aspect for me. (Hopefully they match, but I'm sure there are the odd example were they don't.)

For the 4004 specifically I haven't even studied it at all, I just went by the common wisdom which has it a 4-bit processor.

There's also the 68000 which is supposedly "16/32-bit". Instructions are architected to be 16-bit units. The data bus and ALU are also 16 bits wide, but that's more of a hardware implementation detail. The programming model is pretty much 32 bit throughout.

Larsbrinkhoff (talk) 13:57, 12 July 2023 (CEST)

I've been thinking about it, and I'm still somewhat lost. I think actual ALU width isn't such a big deal (e.g. the LSI-11's ALU is only 8 bits wide); it's more the 'architectural' ALU size - i.e. the size of the largest data item the instruction set will handle.

I'd forgotten the 68K had 16-bit instructions (even though I used them for several years, including writing a debugger for it); I think I just had this idea that the PDP-11 got as much out of a 16-bit instruction as one could, so the 68K 'must' have had a 32-bit instruction. The 68000 had a 24-bit address bus, and a 16-bit data bus; but the 68020 had 32-bit wide address and data buses - with the same instruction set. So the physical bus width is kind of like the 'actual ALU' width - less important than the architectural width.

So the architectural address space and data size are important. Jnc (talk) 17:46, 12 July 2023 (CEST)