IAS computer

The IAS computer (sometimes called the IAS machine; it seems not to have had a formal name) was a very early electronic programmable computer. The group that designed and built it began the task in June, 1946, and it passed its initial acceptance test in June, 1952. Its most significant contribution was the vast list of first-generation computers, both in the US, and around the world, which were copies of it (below).

The group, the Electronic Computer Project (ECP), was assembled by John von Neumann at the Institute for Avanced Study (IAS) at Princeton (von Neumann's base institution at the time). This machine became his focus after his involvement in the planning for, and design of, the EDVAC had enlightened him to the promise of the field. (He broke off his connection to John Mauchly, and especially J. Presper Eckert, because they were focused on starting a business, the eventual Eckert–Mauchly Computer Corporation, and he wished to make all his work public - as the many copies of the IAS computer testified.)

The engineers on the ECP team initially included Julian Bigelow (Chief Engineer; replaced mid-way with initial team-member James Pomerene), John Davis, Robert Shaw, Ralph Slutz, and Willis Ware; Morris Rubinoff and Dick Snyder joined later. Other members of the team included Arthur Burks, Jule Charney, Hewitt Crane, N. Emslie, Gerald Estrin, E. Frei, Herman Goldstine, T. Hildebrandt, G. Kent, W. Melville, J. Rosenberg, Morris Rubinoff, Richard L. Snyder, and others. Their work was widely distributed via progress reports, which were circulated extensively. The IAS closed the ECP in 1957-58 (the exact date is uncertain); apparently because as an organization it was uncomfortable with such an essentially practical effort. The personnel then scattered, taking their knowledge with them; many became leading lights on other early computers.

Technical details

It was an asynchronous parallel computer internally, using binary in 40-bit words. It eventually used 40 Williams tubes for its main memory (after the Selectron project failed to produce usable memory), 1K words in total, each tube using a 32x32 array. (Although this memory had to be refreshed, refresh cycles could be combined with read/write operations when possible.) The logic was constructed using vacuum tubes (although only about 3,000; many fewer than the ENIAC).

The machine included 3 registers, each 40 bits long:

• RI (also given as R₁ in documentation) - the Accumulator; one input to the adder, receives the output from the adder
• RII (also R₂) - the Arithmetic Register; used in multiplication and division
• RIII (also R₃) - the Memory Register; the other input (possibly complemented, or zeroed) to the adder

Each register is composed internally of a pair of 'sub-registers' (termed "ranks"), denoted as R_n (the "permanent rank") and Rⁿ (the "temporary rank") in contemporary documentation. RI and RII can perform single-bit left and right shifts when copying data from the Rⁿ rank to R_n; an un-shifted copy can take place from R_n to Rⁿ. RIII can also be copied to RII, and RII to RI.

Instructions were 20 bits long, and contained a 10-bit opcode and a 10-bit address. There were 16 instruction classes, each with some variants, not all of which did something useful. (For instance, the 'load RII' instruction could optionally clear RI.) There were about 30 in total; there is a table at the end of the "Final Report" (below).

It had instructions to perform multiplication and division, but no special hardware; both were performed a bit at a time, with shifting (performed with the sub-registers described above) and addition/subtraction. (Throughout the contemporary documentation, a great amount of attention is paid to the details of the arithmetic - as one might expect of a design in which John von Neumann was involved!)

It was eventually given a drum of 2K words; there was a plan to replace that with a 12K one. I/O was on paper tape initially, later switched to punched cards, and supplemented with a 7" CRT for graphics output.

Copies

As mentioned, many copies of it were built, early on (and a few later), some with the help of people who had worked on the IAS machine. The faithfulness of the copies varied from machine to machine (apparently including a last one, built with transistors); the later ones used core memory. The list of the US ones, with their dates of completion, is:

• AVIDAC(Argonne) - January, 1953
• CYCLONE (Iowa State University) - July, 1959
• ILLIAC (Illinois) - September, 1952
• JOHNNIAC (Rand) - March, 1954
• MANIAC (Los Alamos) - March, 1952 (slightly before the original)
• MISTIC (Michigan State University) - November, 1957 (a copy of the ILLIAC)
• ORACLE (Oak Ridge) - September, 1953
• ORDVAC (Aberdeen) - November, 1951

(The MANIAC was said to have been so named in protest against the 'cute' names which had become the fashion.) Elsewhere, they included:

• BESK (Royal Institute of Technology, Sweden) - November, 1953 (included hardware floating point)
• DASK (Academy of Technical Sciences, Denmark) - 1957 (a copy of BESK)
• EDB-1 (Facit, Sweden) - 1957 (another copy of BESK, without floating point)
• MUSASINO-1 (NTT, Japan) - March, 1957
• SARA (SAAB, Sweden) - 1957 (another tweaked copy of BESK)
• SILLIAC (University of Sydney, Australia) - June, 1956
• SMIL (Lund University, Sweden) - June, 1956
• TRASK (Datasystem AB, Sweden) - 1965 (another copy of BESK, using transistors and core)
• WEIZAC (Weizmann Institute, Israel) - October, 1955

The IBM 701 was apparently a 'cleaned up' copy as well, as were the EDB-2 and EDB-3 families built in Sweden from 1957 on, and the FACOM 201 (a copy of the MUSASINO-1) produced by Fujitsu from 1960.

Several other machines (such as the BESM 1) were built after close study of the IAS computer's documentation (and in the BESM 1's case, that of the BESK as well), but were not copies of it.

Further reading

Books

• Herman H. Goldstine, The Computer from Pascal to von Neumann, Princeton University, Princeton, 1972 - contains details of the entire effort, in which Goldstine participated
• William Aspray, John von Neumann and the Origins of Modern Computing, MIT Press, Cambridge, 1990
• Nicholas Metropolis, Jack Howlett, Gian-Carlo Rota (editors), A History of Computing in the Twentieth Century, Academic Press, New York, 1980 - the IAS computer is covered in the first section of Part IV; many descendants are covered in detail in other sections
• George Dyson, Turing's Cathedral: The Origins of the Digital Universe, Pantheon, New York, 2012 - focused on the creation of this machine at the Institute for Advanced Study
• Raul Rojas, Ulf Hashagen, The First Computers: History and Architectures, MIT Press, Cambridge, 2002 - the IAS machine is covered in chapter II/4; no detail of the machine, but interesting coverage of the background and influence
• John Deane, The IAS Computer Family Scrapbook - lists further information sources for each machine

Papers

• Arthur W. Burks, Herman H. Goldstine, John von Neumann, Preliminary discussion of the logical design of an electronic computing instrument, Institute for Advanced Study, Princeton, June, 1946 - thoughts about the design of a computer - before any had ever been built!
• W. H. Ware, The History and Development of the Electronic Computer Project at the Institute for Avanced Study (Rand Report P-377, March, 1953) - includes interesting detail of the electrical engineering design philosophy; implementation details of many of the 'copy' machines; and personnel notes
• Gerald Estrin, A description of the electronic computer at the Institute for Advanced Studies, Proceedings of the 1952 ACM national meeting (Toronto), September 1952 - very complete, but low-level, description

External links

• IAS - documentation at Bitsavers (skimpy)
  • Final Progress Report on the Physical Realization of an Electronic Computing Instrument - contains a lot of details on the mathematics, and a detailed list of instructions
• Electronic Computer Project