Difference between revisions of "KEF11-A floating point chip"
From Computer History Wiki
(A decent start) |
m (link kdf11 CPUs) |
||
| Line 1: | Line 1: | ||
| − | The '''KEF11-A floating point chip''' is an optional chip for [[PDP-11]] | + | The '''KEF11-A floating point chip''' is an optional chip for [[KDF11 CPUs|PDP-11 CPUs]] which use the [[F-11 chip set]]. It implemented the [[FP11 floating point|FP11]]-compatible [[floating point]]. |
The KEF11-A requires the [[KTJ11-A memory management chip]], since the floating point registers are actually in the KTJ11-A (probably because the KEF11-A is microcode, and there aren't enough pins for both the data bus, and the microcode bus). | The KEF11-A requires the [[KTJ11-A memory management chip]], since the floating point registers are actually in the KTJ11-A (probably because the KEF11-A is microcode, and there aren't enough pins for both the data bus, and the microcode bus). | ||
The KEF11-A is another dual carrier (with the chips being DEC part # 23-002C7-Ax and DEC part # 23-003C7-Ax; only the A revision of both has been seen). | The KEF11-A is another dual carrier (with the chips being DEC part # 23-002C7-Ax and DEC part # 23-003C7-Ax; only the A revision of both has been seen). | ||
Revision as of 02:15, 15 November 2016
The KEF11-A floating point chip is an optional chip for PDP-11 CPUs which use the F-11 chip set. It implemented the FP11-compatible floating point.
The KEF11-A requires the KTJ11-A memory management chip, since the floating point registers are actually in the KTJ11-A (probably because the KEF11-A is microcode, and there aren't enough pins for both the data bus, and the microcode bus).
The KEF11-A is another dual carrier (with the chips being DEC part # 23-002C7-Ax and DEC part # 23-003C7-Ax; only the A revision of both has been seen).
