MF20 MOS memory
From Computer History Wiki
The MF20 was a MOS DRAM main memory system for the later PDP-10s, principally the final KL10s (models KL10-E and KL10-R). An MF20 contained up to three storage groups, each with 256KW, for a maximum of 768KW; up to 4 MF20's could be connected to a single system, for a total of up to 3072KW.
ECC is provided to protect the memory contents. The access time is .80 µseconds at the CPU, and the cycle time is 1.00 µseconds (both for the first word in a 4-word block). It connected to the KL10's ugraded internal memory bus, the X-Bus.
The sizes above are with 16Kx1 chips; the manual says that 646Kx1 chips would be supported, giving 1024KW for a group, but it's not clear if this was ever produced.
