Difference between revisions of "SDS 930"

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(Category: Xerox Mainframes)
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The '''SDS 930''' (renamed to '''XDS 930''' after [[Scientific Data Systems|SDS]] was purchased by Xerox and renamed 'XDS') was a [[mainframe]] with a 24-bit [[word]] length (with an extra bit for [[parity]]). It was constructed out of [[bipolar]] discrete [[transistor]]s, and used [[core memory]].
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The memory was available in bank sizes of 4KW, 8KW and 16KW; the basic system could hold up to two banks, up to a maximum of 32KW. Use of more than 16KW required optional [[bank switching]] hardware. The basic configuration included multiply and divide in [[hardware]], but no [[floating point]] in hardware (although there are [[instruction]]s to support it, such as [[normalization]], etc). <!-- an optional hardware floating point unit, the 'correlation and filtering unit' (CFE) may have been added later - as of Nov 69, fp was in software -->
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A 930 was upgraded with [[memory management]] hardware (including [[virtual memory]]) by [[Project Genie]] at UC Berkeley, to allow it to be used for creating the [[Berkeley Timesharing System]]; that machine was effectively the prototype of the later [[SDS 940]].
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==External links==
 
==External links==
  
* Bitsavers:
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* [http://www.bitsavers.org/pdf/sds/9xx/930/ SDS 930] - documentation at Bitsavers
** [http://bitsavers.org/pdf/sds/9xx/930/ SDS 930 documents.]
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** [http://www.bitsavers.org/pdf/sds/9xx/930/900066C_930_Technical_Manual_Feb66.pdf SDS 930 Technical Manual]
** [http://www.bitsavers.org/bits/SDS/9xx/ SDS 9xx programs.]
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** [http://www.bitsavers.org/pdf/sds/9xx/930/900064F_930_RefMan_Nov69.pdf XDS 930 Reference Manual]
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* [http://www.bitsavers.org/bits/SDS/9xx/ SDS 9xx] - programs
  
 
[[Category: Xerox Mainframes]]
 
[[Category: Xerox Mainframes]]

Latest revision as of 17:39, 4 May 2022

The SDS 930 (renamed to XDS 930 after SDS was purchased by Xerox and renamed 'XDS') was a mainframe with a 24-bit word length (with an extra bit for parity). It was constructed out of bipolar discrete transistors, and used core memory.

The memory was available in bank sizes of 4KW, 8KW and 16KW; the basic system could hold up to two banks, up to a maximum of 32KW. Use of more than 16KW required optional bank switching hardware. The basic configuration included multiply and divide in hardware, but no floating point in hardware (although there are instructions to support it, such as normalization, etc).

A 930 was upgraded with memory management hardware (including virtual memory) by Project Genie at UC Berkeley, to allow it to be used for creating the Berkeley Timesharing System; that machine was effectively the prototype of the later SDS 940.

External links