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  • ...life, the QBUS added support for block transfers, to increase the transfer rate of the bus. ...sent only once in a group of cycles, thereby nearly doubling the transfer rate of the bus. Only later models of main memory (slaves) and devices (DMA mast
    13 KB (2,043 words) - 23:27, 14 January 2024
  • ...y limit of 4MB. Do keep in mind that user programs are still limited to 16 bit addressing and hence restricted to a limit of just 2x 64KB, when using sepa ...like the /70 has, so it was not possible to use diskdrives with a transfer rate too high.</i>
    4 KB (584 words) - 23:42, 29 February 2024
  • | transfer rate = 4.3 M/sec (un-buffered) <!-- 538 KB/s --> | sectors = 20 (18-bit words)<br>22 (16-bit words)
    3 KB (492 words) - 00:27, 15 August 2023
  • | transfer rate = 125 KB/sec<br>16 μsec/word (60 Hz)<br>19.2 μsec/word (50 Hz) ...disk]] [[drive]] which could store up to 524KB of data, addressable on 16 bit [[word]] boundaries (most other DEC disk drives of this era used 512 byte b
    1 KB (212 words) - 22:14, 14 August 2023
  • | transfer rate = 102 Kword/sec (RK8E)<br>90.1 Kword/sec (RK11) ...radius where the side members bend over appears to be about 2.4mm (it's a bit difficult to measure exactly because of the thick, soft paint coating).
    7 KB (1,170 words) - 00:30, 15 August 2023
  • | word size = 16 bit The '''NORD-10''' was a medium-sized general-purpose 16-[[bit]] [[minicomputer]] designed for multilingual [[time-sharing]] applications
    8 KB (1,313 words) - 13:52, 11 July 2023
  • The [[PDP-8 family|PDP-8]] is a 12-bit [[architecture]] from [[DEC]]; the first commercially successful [[minicomp ...main memory]] (all [[core memory]], in the early models) of 4,096 twelve-[[bit]] [[word]]s (that is, 4K words, equivalent to 6 kilobytes). In most models,
    22 KB (3,497 words) - 19:34, 29 November 2022
  • ...d versions of S.E.C. built with miniature components. The digit repetition rate is 50kc/s. Storage capacity is of the magnetic [[drum]] type and gives 512 * [[Main memory]]: Rotating drum with 512 32-bit words ''(some sources say 36 bits, which could explain the instruction bits
    4 KB (647 words) - 20:59, 18 March 2024
  • * Bit density - 6667 bits per inch * Data rate - 500 Kbits/s; 45 Kbytes/s
    2 KB (283 words) - 14:08, 27 July 2023
  • ...had the 'Clan 7'. [[Harris]] had the HCX-5, -7, and -9 models (for which a bit survives - below), running the [[SysV]] derivative HCX/UX. ...] was implemented in [[transistor-transistor logic|TTL]]; it had a [[clock rate]] of 100nS.
    3 KB (361 words) - 17:01, 16 February 2024
  • DISOWN system call. Each bit controls a separate option. start it. Normally, clears the job's %TBWAT bit, so if it
    171 KB (29,660 words) - 17:55, 28 December 2018
  • driver uses the 0100 bit of the minor device number to indicate whether or not to interleave a fil ht driver uses the 04 bit to indicate whether or not to
    42 KB (6,834 words) - 03:01, 17 January 2023
  • EOT; parity bit passed back) Set terminal baud rate to the number given, if pos-
    3 KB (370 words) - 18:19, 26 October 2009
  • not need to be changed. The penalty is a little bit of disk transfer rate than the rather slow RF, and in swapping the
    29 KB (3,738 words) - 02:56, 17 January 2023
  • | transfer rate = 17.4 Mbits/sec ...It was internally operated by a pair of [[microprocessor]]s, which used 32-bit burst [[error-correcting code|ECC]] to invisibly repair simple data errors.
    4 KB (542 words) - 03:16, 31 August 2023
  • Data transfer rate 1.500 MB/S int Bytes/Sector 512 spin-up W ECC Bit
    25 KB (3,017 words) - 18:47, 13 January 2024
  • | transfer rate = 781 Kbytes/sec ...data formats: [[Phase Encoding]] (PE) or [[Group Coded Recording]] (GCR). Bit density wss 1600 bits per inch for the PE format and 6250 bits per inch for
    2 KB (313 words) - 22:25, 21 April 2024
  • ...(RM02/18-bit)<br>1.65 μsec/word (RM03/16-bit)<br>1.86 μsec/word (RM03/18-bit)<br> | sectors = 30 (18-bit words)<br>32 (16-bit words)
    4 KB (533 words) - 17:08, 15 August 2023
  • | capacity = 205 Mbytes (16-bit mode, formatted)<br>208 Mbytes (18-bit mode, formatted) | transfer rate = 1.3 Mbytes/sec
    4 KB (524 words) - 10:36, 31 August 2023
  • | transfer rate = 1.4 Mbytes/sec ...rmatted). It was internally operated by a [[microprocessor]] which used 32-bit burst [[error-correcting code|ECC]] to invisibly repair simple data errors.
    2 KB (280 words) - 10:35, 31 August 2023
  • | transfer rate = 1.2 Mbytes/sec ...surface. It was internally operated by a [[microprocessor]] which used 32-bit burst [[error-correcting code|ECC]] to invisibly repair simple data errors.
    2 KB (332 words) - 03:16, 31 August 2023
  • | transfer rate = 1.2 Mbytes/sec | tracks = 561 (18-bit word mode)<br>559 (16-bit word mode)
    3 KB (355 words) - 16:23, 18 August 2023
  • | transfer rate = 2.4 Mbytes/sec ...It was internally operated by a pair of [[microprocessor]]s, which used 32-bit burst [[error-correcting code|ECC]] to invisibly repair simple data errors.
    2 KB (306 words) - 03:12, 31 August 2023
  • Data transfer rate 0.625 MB/S int Bytes/Sector 256 spin-up W ECC Bit -
    19 KB (2,330 words) - 14:58, 5 January 2024
  • a minimal rate SLOWSCAN, which gives the desired number of rate at which the clock algorithm is run increases linearly
    57 KB (8,582 words) - 03:00, 17 January 2023
  • od New options O, X, and D print 32 bit integers in the clock scan rate in revolutions-per-minute now
    39 KB (5,307 words) - 05:01, 11 December 2018
  • 3.4.2 Bit Test and Modify Instructions 3.4.3 Bit Scan Instructions
    890 KB (107,817 words) - 03:20, 3 January 2024
  • The very first generation of microcomputers were 8-bit machines, such When 16-bit microprocessors were first announced, Microsoft knew that
    627 KB (92,395 words) - 03:42, 17 December 2018
  • ...l line interface|EIA RS-232]] connectivity at speeds of 110 to 9600 [[baud rate|baud]] (the range depended on the version); the DL11-E version also provide ...sition dial selectors (one for transmit, one for receive) which selected a rate:
    7 KB (1,055 words) - 17:22, 6 February 2024
  • .../data bit (FM); 2 usec/data bit (MFM) (diskette to drive buffer); 1.2 usec/bit (uffer to CPU interface) | words per sector = 64 16-bit
    8 KB (1,195 words) - 20:09, 15 August 2023
  • ...ifferent sizes, but normally were all 256 words; a tape could hold 128K 12-bit words. * Reading/writing rate - 25K lines/second (40 micro-seconds/line)
    3 KB (519 words) - 02:13, 28 February 2024
  • ...t, or 128 36-bit words. A tape could hold 184K 12-bit words, or 144K 16/18-bit words. * Reading/writing rate - 30K lines/second (33-1/3 micro-seconds/line)
    5 KB (736 words) - 14:21, 30 May 2022
  • | CPU-clock-rate = 114MHz [[#ref_1|[1]]] | Memory-checking = 7-bit ECC/longword [[#ref_2|[2]]]
    1 KB (135 words) - 08:20, 12 September 2023
  • ...ated at 10 Mbits/second; it has since been refined to support higher [[bit rate]]s and longer link distances (but see 'Parameter contention' below). Follow The 48-bit physical address of the DIX Ethernet is known as the [[Media Access Control
    8 KB (1,199 words) - 22:00, 5 October 2023
  • | transfer rate = 7.4 usec/18-bit word | words per sector = 256 18-bit
    2 KB (299 words) - 20:41, 10 February 2024
  • ...his allows twice as many bits to be encoded for a given maximum transition rate. ...bit time for a '1', and no reversal for a '0'. A reversal ''between'' data bit times occurs with consecutive zeros.
    788 bytes (130 words) - 11:52, 14 July 2022
  • ...ock time); for a '1', there is an additional reversal in the middle of the bit time, with no reversal indicating a '0'. ...ersal between data bit times; consecutive ones show two reversals in every bit time (i.e. doubling the frequency of reversals; hence the name).
    729 bytes (122 words) - 21:21, 14 December 2018
  • ...ain a circular selector switch in the upper left corner to select the baud rate of the built-in serial line; also, the position of the large [[UART]] chip ...savers.org/pdf/dec/pdp11/1105/1105_RevAH_Engineering_Drawings_Jul76.pdf 16 bit computer (PDP 1105) engineering drawings, Revision AH] (covers the KD11-B o
    11 KB (1,726 words) - 21:07, 2 July 2023
  • The Alto was novel, for its time, in that each machine had a [[bit-mapped display]], allowing the creation of a [[graphical user interface]], ...long with four PCBs for [[main memory]] (in a 64KW [[address space]] of 16-bit [[word]]s), and those for [[device controller]]s such as the [[disk]], disp
    6 KB (863 words) - 22:39, 3 October 2023
  • ...option which provides a [[line time clock]], producing [[interrupt]]s at a rate of 50 or 60 Hz, driven from the [[alternating current|AC]] power provided t ...every clock cycle (and causes an interrupt when that happens, if the other bit is set).
    1 KB (219 words) - 01:58, 8 February 2022
  • ; 7 not only is 8th bit ignored, also will not send NULL char L0025 mov a,#01H ;both recv & xmit at same baud rate
    24 KB (5,539 words) - 03:05, 27 December 2018
  • In [[data communication]], '''baud rate''' (sometimes called '''symbol rate''') is the speed at which basic symbols are transferred across a [[communic ...there would be 2 bits per symbol, and the bit rate would be twice the baud rate.
    680 bytes (108 words) - 20:55, 13 December 2018
  • ...e produced (over 800 by the beginning of 1958 alone), at a peak production rate of one per day. One source opines that "it is safe to say that, for several ...validity checking', since only 10 codes out of the 128 available (with 7 [[bit]]s per digit) were valid. (The machine gained a reputation for reliability,
    4 KB (620 words) - 21:08, 18 March 2024
  • ...s that it was [[random access]]; the time to gain access to any particular bit was constant. ...ickly, so the data had to be [[memory refresh|refreshed]] at a fairly high rate.
    2 KB (354 words) - 15:57, 14 March 2024
  • ...riginally in the range of 1 mega-[[bit]]/second, although speeds of 1 giga-bit/second and up are now common).
    682 bytes (103 words) - 17:41, 15 June 2022
  • | transfer rate = 30 usec/36-bit word | words per sector = 128 32-bit
    1 KB (156 words) - 00:32, 15 August 2023
  • | transfer rate = 2 μsec/byte (RS03), μ1 sec/byte (RS04) ...fixed-platter [[fixed-head disk]] [[drive]]s. Their basic format was 18-[[bit]] [[word]]s (for use in [[PDP-10]] and [[PDP-15]] machines), but they could
    3 KB (488 words) - 18:37, 14 August 2023
  • *16-color and 256-[[List of 16-bit computer hardware palettes#MCGA and VGA|color paletted]] display modes. *262,144-color [[List of monochrome and RGB palettes#18-bit RGB|global palette]] <small>(6&nbsp;bits, and therefore 64 possible levels,
    11 KB (1,681 words) - 12:41, 27 February 2024
  • ...to transfer data, in either [[half-duplex]] or [[full-duplex]], at [[baud rate]]s up to 50K bits/second; [[parity]] was supported for error detection. ...201, 301 and 303 series [[modem]]s. The [[character]] length (6, 7 or 8 [[bit]]s), and the [[sync character]], were selectable under program control, as
    6 KB (849 words) - 04:17, 18 February 2023
  • * [[baud rate]]s (ranging from 45 to 1200) ...dress and Word Count tables below); the Break Status Register also has one bit per line. The Base Address Register is 8 bits wide, so the in-memory tables
    8 KB (1,088 words) - 02:24, 19 February 2023

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