The VDH/11 Very Distant Host Controller (VDH-11 has been seen in contemporaneous documents as the name, but this is probably not correct; no documentation has survived - the information below has been gathered by examining extant device drivers) is a DMA UNIBUS synchronous serial line peripheral produced by ACC to allow a UNIBUS machine to connect to an ARPANET IMP, using the 'Very Distant Host' interface specification.
It was described in one contemporaneous ad as:
- "Full-duplex DMA error-checking communications unit [which] connects a PDP-11 to an ARPANET IMP. Sends and receives bisync mode. Provides dual-buffered DMA on input and real time clock. For use on ARPA-style networks using 24-bit or 16-bit CRC."
Registers
| Register |
Abbreviation |
Address
|
| Command & Status In Register |
CSRI |
0767600
|
| Data Buffer In Register |
DBRI |
0767602
|
| Current Word Address In Register |
CWAI |
0767604
|
| Word Count In Register |
WCI |
0767606
|
| Command & Status Out Register |
CSRO |
0767610
|
| Data Buffer Out/Clock Register |
DBRO |
0767612
|
| Current Word Address Out Register |
CWAO |
0767614
|
| Word Count Out Register |
WCO |
0767616
|
0767600: Control & Status In Register (CSRI)
| ANYERR |
CHKERR |
OVERRUN |
WCERR |
FORMERR |
Unused |
READY |
INTENB |
Unused |
ABRUN |
ABSEL |
EOT |
GO
|
| 15
|
14
|
13
|
12
|
11
|
10
|
09
|
08
|
07
|
06
|
05
|
04
|
03
|
02
|
01
|
00
|
- ANYERR - Some kind of VDH error
- CHKERR - Checksum error
- OVERRUN - Overrun error
- WCERR - Word count error
- FORMERR - Packet format error
- READY - VDH ready
- INTENB - Interrupt enable
- ABRUN - Buffer A/B running
- ABSEL - Select buffer A/B [A=0] /
- EOT - Packet copied into core
- GO - Start channel
0767602: Data Buffer In Register (DBRI)
| Data15 <---> Data00
|
| 15
|
14
|
13
|
12
|
11
|
10
|
09
|
08
|
07
|
06
|
05
|
04
|
03
|
02
|
01
|
00
|
0767604: Current Word Address In Register (CWAI)
| WA15 <---> WA00
|
| 15
|
14
|
13
|
12
|
11
|
10
|
09
|
08
|
07
|
06
|
05
|
04
|
03
|
02
|
01
|
00
|
0767606: Word Count In Register (WCI)
| WC15 <---> WC00
|
| 15
|
14
|
13
|
12
|
11
|
10
|
09
|
08
|
07
|
06
|
05
|
04
|
03
|
02
|
01
|
00
|
0767610: Control & Status Out Register (CSRO)
| Unused |
OVERRUN |
WCERR |
Unused |
READY |
INTENB |
TIMSEL |
TIMRUN |
EOTINT |
TIMINT |
Unused |
GO
|
| 15
|
14
|
13
|
12
|
11
|
10
|
09
|
08
|
07
|
06
|
05
|
04
|
03
|
02
|
01
|
00
|
- OVERRUN - Overrun error
- WCERR - Word count error
- READY - VDH ready
- INTENB - Interrupt enable
- TIMSEL - Timer select
- TIMRUN - Timer run, i.e. enable
- EOTINT - EOT caused interrupt
- TIMINT - Timer caused interrupt
- GO - Start channel
0767612: Data Buffer/Clock Out Register (DBRO)
| Data15 <---> Data00
|
| 15
|
14
|
13
|
12
|
11
|
10
|
09
|
08
|
07
|
06
|
05
|
04
|
03
|
02
|
01
|
00
|
0767614: Current Word Address Out Register (CWAO)
| WA15 <---> WA00
|
| 15
|
14
|
13
|
12
|
11
|
10
|
09
|
08
|
07
|
06
|
05
|
04
|
03
|
02
|
01
|
00
|
0767616: Word Count Out Register (WCO)
| WC15 <---> WC00
|
| 15
|
14
|
13
|
12
|
11
|
10
|
09
|
08
|
07
|
06
|
05
|
04
|
03
|
02
|
01
|
00
|
External links
