Motorola MC68020
From Computer History Wiki
| MC68020 | |
| Family: | Motorola M68000 Family |
|---|---|
| Architecture: | 32-bit |
| Manufacturer: | Motorola |
| Year Introduced: | 1984 |
| Address bus: | 32-bit |
| Data bus: | 32-bit (but can work with 8- or 16-bit buses) |
| Number of registers: | 15 general 32-bit registers (8 data, 7 address) |
| Cache: | 256 byte icache |
| Clock Speed: | 12.5 MHz - 33.33 MHz |
The Motorola MC68020 is a 32-bit microprocessor in the Motorola M68000 Family, the first of the second generation in that family, with a full 32-bit implementation throughout (including the data bus).
Earlier members were the 68000, 68008, 68010, and 68012. Later members include the 68030, 68040 and 68060.
Performance was increased by the use of pipelining and caching; the MC68020 included a three-stage pipeline, along with a 256-byte cache (for instructions only). It also had a companion floating point chip, the MC68881, which provided IEEE-compatiable floating point.
