KB11-A CPU

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The KB11-A CPU is the earlier CPU for the PDP-11/45. The optional FP11-B Floating-Point Processor and KT11-C Memory Management Unit of the PDP-11/45 plugged into the CPU's backplane.

In addition to main memory on the UNIBUS, the KB11-A could also use the special high-speed MS11 Semiconductor Memory System, specific to the PDP-11/45, which plugged into a special bus, the Fastbus, which was also part of the CPU's backplane.

The KB11-A was the first of a series of PDP-11 CPUs which were modified versions of this design.

Boards

The KB11-A board set included:

  • M8100 Data and Address Paths
  • M8101 General Register and Control
  • M8102 Instruction Register and Decode
  • M8103 ROM and ROM Control
  • M8104 Processor Data and UNIBUS Registers
  • M8105 Timing and Miscellaneous Control
  • M8106 UNIBUS and Console Control
  • M8109 Timing Generator

In addition, the CPU includes either:

  • M8116 Segmentation Jumper Board

used when the KT11-C Memory Management Unit is not present, or:

  • M8107 Segmentation Address Paths
  • M8108 Segmentation Status Registers

which comprise the KT11-C.

Documentation

See also