|Manufacturer:||Digital Equipment Corporation|
|Form Factor:||small mainframe|
|Word Size:||36 bits|
|Logic Type:||LS TTL ICs|
|Design Type:||clocked synchronous microcoded|
|Clock Speed:||300 nsec (micro-cycle)|
|Cache Size:||512 words|
|Cache Speed:||300 nsec|
|Memory Speed:||0.9 μsec|
|Physical Address Size:||19 bits (some had 20)|
|Virtual Address Size:||18 bits|
|Memory Management:||paging, 512-word pages|
|Operating System:||TOPS-10, TOPS-20, ITS|
The KS10 was the fourth and last generation of PDP-10 processors (themselves, exact re-implementations of the earlier PDP-6 architecture). It was intended as a small, low-cost entry model, not as a replacement for the earlier KL10 mainframe.
For I/O, it used a pair of UNIBUSes, driven by adapters which interfaced them to the KS10's internal bus. One was for the disks only, the other for all other devices (magnetic tape, asynchronous serial lines, etc). A separate page table mapped the UNIBUS address space into the KS10's main memory for DMA operations.
The UNIBUS which is used for the disks was run in 18-bit mode (the two parity lines on that UNIBUS were recycled into two extra data lines). That UNIBUS had only an RH11, mounted in the main CPU cabinet to drive the MASSBUS to the disks. (Only MASSBUS disks were supported, since an 18-bit data path was needed).
- DPE data path
- DPM data path
- CRA control store
- CRM control store
Additional super hex cards held: