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• Extended Memory Interconnect
  The '''Extended Memory Interconnect''' (usually given as the acronym: '''XMI''') was a [[bus]] int ...cessor]]. The bus has special capabilities to support the shared access to memory required by such a system.
  3 KB (493 words) - 13:44, 20 March 2023

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• RSX-11
  ...i-user version that was an adaptation of the earlier RSX-11D for a smaller memory footprint, it was popular on all PDP-11s; [[Dave Cutler]] was the project l *RSX-11S -- a memory-resident version of RSX-11M used in embedded real-time applications.
  7 KB (1,188 words) - 22:11, 6 August 2023
• RSTS/E
  '''RSTS/E''' (an acronym for '''Resource Sharing Time Sharing Extended''') was a [[multi-user]] [[time-sharing|time-shared]] [[operating system]] ...duced in 1973, to take advantage of the memory mapping hardware and larger memory support introduced with the [[PDP-11/45]]. Starting with V5B, RSTS/E suppo
  14 KB (2,134 words) - 16:06, 3 May 2023
• UNIBUS
  ...nd the ability for devices to do [[Direct Memory Access|DMA]] transfers to memory, and to [[interrupt]] the CPU. ...he top 8 Kbytes of [[address space]] was reserved for the registers of the memory mapped I/O devices used in the [[PDP-11 architecture]]; this block is often
  13 KB (2,162 words) - 23:26, 14 January 2024
• PDP-11/20
  | memory speed = [[MM11-E and MM1-F core memories|MM11-E]]: 500 nsec [[access | memory mgmt = none standard
  6 KB (900 words) - 19:27, 31 December 2023
• PDP-11/60
  ...upported only the [[UNIBUS]], which normally limited it to 248KB of [[main memory]]. ...1KW of read-write microcode), an Extended Control Store (1.5KW [[Read-only memory|ROM]] microcode), or a Diagnostic Control Store.
  3 KB (461 words) - 16:34, 11 January 2022
• PDP-11/24
  ...of [[main memory]], using the [[Extended UNIBUS]] between the [[CPU]] and memory; all devices were attached to a semi-separate (see below) UNIBUS. ...ess space]] was statically mapped across to the low 248 Kbytes of EUB main memory, using a cross-connection path on the [[Central Processing Unit|CPU]] board
  8 KB (1,395 words) - 23:37, 29 February 2024
• PDP-11/44
  ...emory Bus and integrated [[MASSBUS]], relying instead on the UNIBUS, and [[Extended UNIBUS|EUB]]. Its [[Central Processing Unit|CPU]], the [[KD11-Z CPU|KD11-Z] ...[UNIBUS map]] which connected the two, and mapped UNIBUS addresses to main memory addresses.
  4 KB (584 words) - 23:42, 29 February 2024
• PDP-11/40
  ...]] platform, after the [[PDP-11/45]] (albeit with a subset of the [[PDP-11 Memory Management]] [[architecture]]). The [[Original Equipment Manufacturer|OEM]] * [[KT11-D Memory Management]]
  4 KB (664 words) - 19:08, 8 February 2024
• PDP-11/45
  ...-C Memory Management Unit]] (the first implementation of the full [[PDP-11 Memory Management]]). ..., using 350 nsec [[Metal Oxide Semiconductor|MOS]] or 300 nsec [[bipolar]] memory, respectively.
  6 KB (895 words) - 23:52, 29 February 2024
• RK11 disk controller
  ...through the [[MX15-B Memory Multiplexer]], directly to the PDP-15's [[main memory]]. ...hat it only supports [[Q16]] QBUS mode when writing data. The two extended memory bits in the CSR have no effect; they may be read and written, but are not c
  14 KB (2,038 words) - 23:04, 13 September 2023
• PDP-11 architecture
  ...he basic [[address space]] was 16 bits, most models could hold more [[main memory]] than that, although only a limited subset was visible to the [[program]] ...early life, when small and expensive [[core memory]] was the standard main memory; and in its later life, when the 16-bit address space became a severe limit
  13 KB (1,949 words) - 17:37, 29 February 2024
• PDP-8/E
  | memory speed = 1.2 μseconds | memory mgmt = [[bank switching|bank selection]], CPU mode
  4 KB (618 words) - 14:11, 14 July 2023
• Applesoft BASIC
  * In this era of carefully counting clock cycles and limited memory, it was inefficient to write speed-dependent programs that ran on a runtime ...] and [[Apple IIc]] models' BASIC interpreters for the new machines' extra memory and double-resolution graphics, or for the [[Apple IIgs|Apple II<small>GS</
  8 KB (1,203 words) - 19:34, 20 June 2023
• NORD-10
  ...iscellaneous improvements, including solid state memory (instead of [[core memory|core]]), thus the '/S'. ..., and [[hardware]] test [[program]]s, were implemented in a 1K [[Read-only memory|ROM]].
  8 KB (1,313 words) - 13:52, 11 July 2023
• PDP-7
  | virtual address = 13 bits (direct), 15 bits (extended) | memory speed = 1.75 μsec
  3 KB (418 words) - 14:35, 11 July 2023
• PDP-10
  ...of a number of separate free-standing units of various types (CPUs, [[main memory]], etc), connected together with [[bus]]ses carried in point-point cables. ...ent busses: there are different types of bus for main memory (the [[PDP-10 Memory Bus]]), and [[peripheral]]s. On the KA10 and KI10 models, the [[PDP-10 I/O
  11 KB (1,640 words) - 20:59, 8 March 2024
• PDP-8 architecture
  The PDP-8's basic configuration had a [[main memory]] (all [[core memory]], in the early models) of 4,096 twelve-[[bit]] [[word]]s (that is, 4K word ...time of 1.5 microseconds, so that a typical two-cycle ([[Fetch]], Execute) memory-reference instruction ran at a speed of 0.333 MIPS.
  22 KB (3,497 words) - 19:34, 29 November 2022
• Bus
  ...after electrical buses, or busbars. Almost always, there was one bus for memory, and another for peripherals, and these were accessed by separate instructi Some time after this, some computers began to share memory between several CPUs. On these computers, access to the bus had to be prio
  14 KB (2,170 words) - 05:09, 5 September 2019
• NUSSE
  * [[Main memory]]: Rotating drum with 512 32-bit words ''(some sources say 36 bits, which c ...ut: 5-channel paper tape and a Teletype printer. This appears to have been extended somewhat later, see the "Faster than thought" reference above
  4 KB (647 words) - 20:59, 18 March 2024
• Running NetBSD on a VAX
  total memory = 16328 KB<br> avail memory = 12480 KB<br>
  6 KB (970 words) - 18:48, 12 August 2010

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