In particular, it had the same limited memory management, without so-called 'I+D separatation', which therefore limited the size of the applications which could run on it; it also supported only the UNIBUS, which normally limited it to 248KB of main memory.
It is of interest now since it had an option to permit loadable microcode; it is a very rare machine, though, since its lack of commercial success meant very few were produced.
The PDP-11/60 is based around the KD11-K CPU. It provided the full FP11 floating point using microcode; as an option, the FP11-E Floating Point Processor, which provided a high-performance implementation as a co-processor, was also available.
1977. The /60 was an expensive "middle-class" machine, intended as the successor of the /40. It should have been introduced after the /70, but was delayed at least 12-18 months due design and debugging problems. It had a writable control store (WCS) for custom instructions, and floating point instructions were implemented in the CPU microcode. It also had 18-bit memory management. With the FPP option it had the best floating point performance among the -11's. As for packaging, it came in the "low boy/high boy" cabinets, the one pictured to the left is the "high" one. The storage devices could be placed in the upper region, the card cage itself was in the lower half.
- PDP-11/60 - BitSavers
|v • d • e PDP-11 Computers and Peripherals|
| UNIBUS PDP-11s - PDP-11/20 • PDP-11/15 • PDP-11/35 • PDP-11/40 • PDP-11/45 • PDP-11/50 • PDP-11/55 • PDP-11/70|
PDP-11/05 • PDP-11/10 • PDP-11/04 • PDP-11/34 • PDP-11/60 • PDP-11/44 • PDP-11/24 • PDP-11/84 • PDP-11/94
Also: PDP-11 architecture • PDP-11 Extended Instruction Set • FIS floating point • FP11 floating point • PDP-11 Commercial Instruction Set • PDP-11 Memory Management • PDP-11 stacks • PDP-11 family differences