Difference between revisions of "UNIBUS map"
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| − | Machines such as the [[KS10]] and [[PDP-11]]s which have a [[UNIBUS]] and more than 248 Kbytes of [[main memory]] have a '''UNIBUS map''' to allow [[DMA]] devices on the UNIBUS access to all of main memory. | + | Machines such as the [[KS10]] and [[PDP-11]]s which have a [[UNIBUS]] and more than 248 Kbytes of [[main memory]] have a '''UNIBUS map''' to allow [[Direct Memory Access|DMA]] devices on the UNIBUS access to all of main memory. |
| − | (Such systems usually use a separate bus, such as the [[Extended UNIBUS]] in the [[PDP-11/44]] and [[PDP-11/24]], the [[Private Memory Interconnect]] in the [[PDP-11/84]], and the Main Memory Bus in the [[PDP-11/70]], between the [[Central Processing Unit|CPU]] and main memory.) | + | (Such systems usually use a separate [[bus]], such as the [[Extended UNIBUS]] in the [[PDP-11/44]] and [[PDP-11/24]], the [[Private Memory Interconnect]] in the [[PDP-11/84]], and the Main Memory Bus in the [[PDP-11/70]], between the [[Central Processing Unit|CPU]] and main memory.) |
| − | On the PDP-11's, when enabled, the UNIBUS map allows 8 Kbyte blocks of UNIBUS [[address space]] to be mapped to 8 Kbyte blocks (there is no ability to limit the size) of main memory, located on any word boundary. (I.e. the blocks of memory to which UNIBUS blocks are mapped are not restricted to be on 8 Kbyte boundaries themselves.) | + | On the PDP-11's, when enabled, the UNIBUS map allows 8 Kbyte blocks of UNIBUS [[address space]] to be mapped to 8 Kbyte blocks (there is no ability to limit the size) of main memory, located on any [[word]] boundary. (I.e. the blocks of memory to which UNIBUS blocks are mapped are not restricted to be on 8 Kbyte boundaries themselves.) |
==PDP-11 Details== | ==PDP-11 Details== | ||
| − | Each UNIBUS address space block has a pair of 16-bit [[register]]s which are concatenated to provide the 22-bit base address in main memory to which that block of UNIBUS address space is mapped. (Technically, the high-order register has only 6 bits, and the low-order register has only 15, since the block cannot be assigned to an odd address.) | + | Each UNIBUS address space block has a pair of 16-[[bit]] [[register]]s which are concatenated to provide the 22-bit base [[address]] in main memory to which that block of UNIBUS address space is mapped. (Technically, the high-order register has only 6 bits, and the low-order register has only 15, since the block cannot be assigned to an odd address.) |
There are 31 pairs, at locations 770200-770372, since the I/O 'page' (i.e. UNIBUS addresses 760000-777776) is not mapped. (In some systems, the '32nd' UNIBUS map register pair can be read or written, but it is not used.) | There are 31 pairs, at locations 770200-770372, since the I/O 'page' (i.e. UNIBUS addresses 760000-777776) is not mapped. (In some systems, the '32nd' UNIBUS map register pair can be read or written, but it is not used.) | ||
Revision as of 16:59, 22 June 2020
Machines such as the KS10 and PDP-11s which have a UNIBUS and more than 248 Kbytes of main memory have a UNIBUS map to allow DMA devices on the UNIBUS access to all of main memory.
(Such systems usually use a separate bus, such as the Extended UNIBUS in the PDP-11/44 and PDP-11/24, the Private Memory Interconnect in the PDP-11/84, and the Main Memory Bus in the PDP-11/70, between the CPU and main memory.)
On the PDP-11's, when enabled, the UNIBUS map allows 8 Kbyte blocks of UNIBUS address space to be mapped to 8 Kbyte blocks (there is no ability to limit the size) of main memory, located on any word boundary. (I.e. the blocks of memory to which UNIBUS blocks are mapped are not restricted to be on 8 Kbyte boundaries themselves.)
PDP-11 Details
Each UNIBUS address space block has a pair of 16-bit registers which are concatenated to provide the 22-bit base address in main memory to which that block of UNIBUS address space is mapped. (Technically, the high-order register has only 6 bits, and the low-order register has only 15, since the block cannot be assigned to an odd address.)
There are 31 pairs, at locations 770200-770372, since the I/O 'page' (i.e. UNIBUS addresses 760000-777776) is not mapped. (In some systems, the '32nd' UNIBUS map register pair can be read or written, but it is not used.)
All machines with a UNIBUS map start off with the map disabled; the software has to set it up and enable it before it commences operation.
Before that happens, the UNIBUS address space is statically mapped to the low 248 Kbytes of main memory; this allows the use of DMA devices on the UNIBUS during the bootstrap process, and initial system startup.
