Difference between revisions of "QBUS CPU ODT"
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* 'P' - proceed CPU after halt | * 'P' - proceed CPU after halt | ||
| − | The main serial interface is normally configured so that when the CPU is running, sending a [[asynchronous serial line|break]] on the console serial line halts the CPU. | + | The main serial interface is normally configured so that when the CPU is running, sending a [[asynchronous serial line|break]] on the console serial line halts the CPU (using the BHALT line of the standard [[QBUS]]). Depending on which interface card is used, some can be set to [[bootstrap]] the machine instead. |
==LSI-11s== | ==LSI-11s== | ||
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* 'M' - maintenance; indicates how the CPU got to ODT | * 'M' - maintenance; indicates how the CPU got to ODT | ||
* 'L' - start microcode [[PDP-11 Bootstrap Loader]] | * 'L' - start microcode [[PDP-11 Bootstrap Loader]] | ||
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| + | ==Limitations== | ||
| + | |||
| + | Note that ODT will not function correctly in the LSI-11s unless there is memory on the QBUS (at location 0). Without that, the CPU will sit in a tight [[loop]], trying to read location 0, and ODT will never start. The reason for this restriction is unknown: the [[KDF11 CPUs]] and [[KDJ11 CPUs]], which also use ODT, do not have this limitation; e.g. a system consisting only of a [[KDF11-A CPU]] and a serial console will run ODT, which will operate as expected. | ||
==See also== | ==See also== | ||
Revision as of 01:52, 22 October 2021
ODT (Octal Debugging Technique) on QBUS PDP-11s is effectively their front panel. These CPUs do not have a front panel to control them; instead, as a cost-reduction measure, when the CPU is halted, specialized microcode uses the main serial line as a operating console. There are commands to read and write main memory, registers in the CPU, start the CPU, etc.
The command set is:
- '/' - open word
- '<CR>' - close open word
- '<LF>' - open next word
- 'G' - start CPU
- 'P' - proceed CPU after halt
The main serial interface is normally configured so that when the CPU is running, sending a break on the console serial line halts the CPU (using the BHALT line of the standard QBUS). Depending on which interface card is used, some can be set to bootstrap the machine instead.
LSI-11s
The LSI-11 CPUs, using the LSI-11 chip set, have an extended ODT syntax with extra commands:
- '^' - open previous word
- '@' - indirect; open word at location given by current word
- '_' - indexed; open word at location given by current word plus the address of the current word
- 'M' - maintenance; indicates how the CPU got to ODT
- 'L' - start microcode PDP-11 Bootstrap Loader
Limitations
Note that ODT will not function correctly in the LSI-11s unless there is memory on the QBUS (at location 0). Without that, the CPU will sit in a tight loop, trying to read location 0, and ODT will never start. The reason for this restriction is unknown: the KDF11 CPUs and KDJ11 CPUs, which also use ODT, do not have this limitation; e.g. a system consisting only of a KDF11-A CPU and a serial console will run ODT, which will operate as expected.
