PDP-11/23-PLUS: Difference between revisions
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{{Infobox Machine| | {{Infobox Machine| | ||
name=PDP-11/23 PLUS| | name=PDP-11/23-PLUS | | ||
image=PDP1123PLUS-01.jpeg | | image=PDP1123PLUS-01.jpeg | | ||
caption=PDP-11/23 PLUS with two RL02s, TK50, and third party SCSI | caption=PDP-11/23-PLUS with two RL02s, TK50, and third party SCSI | | ||
manufacturer=[[Digital Equipment Corporation]] | | manufacturer=[[Digital Equipment Corporation]] | | ||
word size= 16 bit| | word size= 16 bit | | ||
virtual address= 16 bit| | virtual address= 16 bit | | ||
physical address= 22 bit| | physical address= 22 bit | | ||
bus arch= [[QBUS]] | | bus arch= [[QBUS]] | | ||
year introduced = November 1981 | year introduced = November 1981 | ||
|}} | |}} | ||
The PDP-11/23 PLUS, introduced in November 1981, introduced an integrated | The '''PDP-11/23-PLUS''', introduced in November 1981, introduced an integrated solution on a single [[DEC card form factor |quad]]-width [[QBUS]] board, which included [[F-11 chip set|F-11]] [[Central Processing Unit|CPU]], [[memory management]] unit, a socket for inserting an [[KEF11-A floating point chip|KEF11-A]] [[floating point processor|floating point unit]], and two [[asynchronous serial line]]s, which had a maximum speed of 19,200 baud. | ||
=== Essential parts that make up a PDP 11/23-PLUS === | |||
*[[ | * M8189 [[KDF11-B CPU]] board | ||
*22-bit [[ | * 22-bit QBUS [[backplane]] | ||
==External links== | |||
* [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/EK-1T23B-OP-001%20PDP11-23-PLUS%20System%20Manual.pdf PDP-11/23-PLUS System Manual] | |||
* [http://www.bitsavers.org/pdf/dec/pdp11/1123/EK-23BMB-UG_001_1123B_MountingBox_Jan82.pdf PDP-11/23B Mounting Box User's Guide] | |||
{{PDP-11s}} | {{PDP-11s}} | ||
[[Category: QBUS PDP-11s]] | |||
Revision as of 11:24, 15 May 2022
| PDP-11/23-PLUS | |
 PDP-11/23-PLUS with two RL02s, TK50, and third party SCSI | |
| Manufacturer: | Digital Equipment Corporation |
|---|---|
| Year Introduced: | November 1981 |
| Word Size: | 16 bit |
| Physical Address Size: | 22 bit |
| Virtual Address Size: | 16 bit |
| Bus Architecture: | QBUS |
The PDP-11/23-PLUS, introduced in November 1981, introduced an integrated solution on a single quad-width QBUS board, which included F-11 CPU, memory management unit, a socket for inserting an KEF11-A floating point unit, and two asynchronous serial lines, which had a maximum speed of 19,200 baud.
Essential parts that make up a PDP 11/23-PLUS
- M8189 KDF11-B CPU board
- 22-bit QBUS backplane
