Difference between revisions of "FP11-C Floating-Point Processor"
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| − | The '''FP11-C''' was a [[Floating point processor|FPP]] used in the [[PDP-11/45]] and [[PDP-11/70]] computers (KB11-D and KB11-C CPU variants, respectively). | + | The '''FP11-C''' was a [[Floating point processor|FPP]] used in the [[PDP-11/45]] and [[PDP-11/70]] computers (the later [[KB11-D CPU|KB11-D]] and [[KB11-C CPU|KB11-C]] [[Central Processing Unit|CPU]] variants thereof, respectively); it was [[program compatible]] with the [[FP11-B Floating-Point Processor]], which was the progenitor of the semi-standard [[FP11 floating point]] used in many later [[PDP-11]]s. |
| − | + | Like the FP11-B, it operated in parallel with the main processor, so that two [[instruction]]s (one floating point, one regular) could be processed at the same time; unlike the FP11-B, it used an internal [[clock]] which is synchronized to the basic CPU's clock. | |
| + | |||
| + | ==Implementation== | ||
| + | |||
| + | It plugged into special pre-wired slots in the CPU's [[backplane]], and included the following boards: | ||
* M8128 ROM and ROM Control | * M8128 ROM and ROM Control | ||
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* M8126 Fraction Data Path - High Order | * M8126 Fraction Data Path - High Order | ||
* M8127 Fraction Data Path - Low Order | * M8127 Fraction Data Path - Low Order | ||
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| + | ==Further reading== | ||
| + | |||
| + | * ''FP11-C floating-point processor user's manual'' (EK-FP11C-OP-001) | ||
| + | |||
| + | ==External links== | ||
| + | |||
| + | * [http://www.bitsavers.org/pdf/dec/pdp11/1170/EK-FP11C-MM-01_FP11C_May76.pdf FP11-C floating-point processor maintenance manual] (EK-FP11C-MM-001) | ||
| + | * [http://www.bitsavers.org/pdf/dec/pdp11/1145/FP11-C_Field_Maintenance_Print_Set_MP00038_NoRev_Dec75.pdf FP11-C Field Maintenance Print Set] (MP00038) | ||
| + | |||
| + | [[Category: PDP-11 UNIBUS Processors]] | ||
Latest revision as of 01:18, 13 October 2022
The FP11-C was a FPP used in the PDP-11/45 and PDP-11/70 computers (the later KB11-D and KB11-C CPU variants thereof, respectively); it was program compatible with the FP11-B Floating-Point Processor, which was the progenitor of the semi-standard FP11 floating point used in many later PDP-11s.
Like the FP11-B, it operated in parallel with the main processor, so that two instructions (one floating point, one regular) could be processed at the same time; unlike the FP11-B, it used an internal clock which is synchronized to the basic CPU's clock.
Implementation
It plugged into special pre-wired slots in the CPU's backplane, and included the following boards:
- M8128 ROM and ROM Control
- M8129 Exponent and Data Path
- M8126 Fraction Data Path - High Order
- M8127 Fraction Data Path - Low Order
Further reading
- FP11-C floating-point processor user's manual (EK-FP11C-OP-001)
External links
- FP11-C floating-point processor maintenance manual (EK-FP11C-MM-001)
- FP11-C Field Maintenance Print Set (MP00038)
