Difference between revisions of "KS11 Memory Protection and Relocation option"

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All documentation on the KS11 has been lost, so other than the name (below), and an amusing story (ditto), almost nothing is known of it for certain. (The story does reveal that [[Bell Laboratories]]' KS11 must have been one of the first ones built; certainly the first one used with a [[KE11-A Extended Arithmetic Element|KE11-A]].) A very early [[assembly language]] version of [[UNIX]], probably [[UNIX Second Edition]] ([[UNIX Third Edition]] had apparently already moved on to the -11/45) used it, but unfortunately that version has been completely lost, otherwise it would be possible to work out from inspecting the [[source code]] much of how the KS11 worked.
 
All documentation on the KS11 has been lost, so other than the name (below), and an amusing story (ditto), almost nothing is known of it for certain. (The story does reveal that [[Bell Laboratories]]' KS11 must have been one of the first ones built; certainly the first one used with a [[KE11-A Extended Arithmetic Element|KE11-A]].) A very early [[assembly language]] version of [[UNIX]], probably [[UNIX Second Edition]] ([[UNIX Third Edition]] had apparently already moved on to the -11/45) used it, but unfortunately that version has been completely lost, otherwise it would be possible to work out from inspecting the [[source code]] much of how the KS11 worked.
  
−
From the story of the implementation error on handling the KE11-A (an ordinary UNIBUS device, in implementation), the KS11 was apparently not part of the [[Central Processing Unit|CPU]], but a UNIBUS active repeater, placed between the UNIBUS leaving the CPU, and the [[main memory]] and [[peripheral|devices]] on the rest of the the UNIBUS (in the same manner as the [[KT11-B Paging Option]]).
+
From the story of the implementation error on handling the KE11-A (an ordinary UNIBUS device, in implementation), the KS11 was apparently not part of the [[Central Processing Unit|CPU]], but a UNIBUS active repeater, placed in the UNIBUS between the CPU, and the [[main memory]] and [[peripheral|devices]] on the rest of the the UNIBUS (in the same manner as the [[KT11-B Paging Option]]).
  
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In addition, several other things about the KS11 can be deduced from what we do know. The name indicates that it proved both ''protection'' (i.e. it limited the bus [[address]]es to which the [[user]] could reference), and also ''relocation'' (i.e. the [[address space]] visible to the user was not just main memory, as visible to the CPU, but could be moved elsewhere in main memory).
+
In addition, several other things about the KS11 can be deduced from what little we do know. The name indicates that it proved both ''protection'' (i.e. it limited the bus [[address]]es to which the [[user]] could reference), and also ''relocation'' (i.e. the [[address space]] visible to the user was not just main memory, as visible to the CPU, but could be moved elsewhere in main memory).
  
 
It is not known whether the KS11 also allowed use of more than 56KB of main memory, the capacity of an ordinary -11/20, by mapping part of the UNIBUS address space which the -11/20 CPU ''can'' see (i.e. in the 0-56KB range) up to higher addresses, where 'extra' memory is configured. Such a capability would have been trivial to add to something with the KS11's known capabilities, but some one-time users think use of an [[MX11-A Memory Extension Control|MX11]] might have been needed to add extra main memory.
 
It is not known whether the KS11 also allowed use of more than 56KB of main memory, the capacity of an ordinary -11/20, by mapping part of the UNIBUS address space which the -11/20 CPU ''can'' see (i.e. in the 0-56KB range) up to higher addresses, where 'extra' memory is configured. Such a capability would have been trivial to add to something with the KS11's known capabilities, but some one-time users think use of an [[MX11-A Memory Extension Control|MX11]] might have been needed to add extra main memory.
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It also reportedly supported some sort of user/kernel mode distinction, which might have require a tie-in to the CPU. But not necessarily; if there was a [[flip-flop]] in the KS11 which stored the 'CPU mode' bit, it might be automatically cleared (if being set meant 'in user mode') on all [[interrupt]]s (which can be seen on the UNIBUS). It is not clear how such a thing would have handled [[trap]]s, though (for that, the KT11-B used a link to the [[KA11 CPU]], to which minor changes were made). The 'Option and Module List' indicates that the KS11 was only for the -11/20, which might indicate it did have such a tie-in.
 
It also reportedly supported some sort of user/kernel mode distinction, which might have require a tie-in to the CPU. But not necessarily; if there was a [[flip-flop]] in the KS11 which stored the 'CPU mode' bit, it might be automatically cleared (if being set meant 'in user mode') on all [[interrupt]]s (which can be seen on the UNIBUS). It is not clear how such a thing would have handled [[trap]]s, though (for that, the KT11-B used a link to the [[KA11 CPU]], to which minor changes were made). The 'Option and Module List' indicates that the KS11 was only for the -11/20, which might indicate it did have such a tie-in.
 +
 +
==Hardware registers==
 +
 +
From definitions in [[MIMIC]], we gather the KS11 had eight 16-bit registers.
 +
 +
{| class="wikitable"
 +
! Name || Description
 +
|-
 +
| KSS || Status
 +
|-
 +
| KSPL || Low segment protection
 +
|-
 +
| KSRL || Low segment relocation
 +
|-
 +
| KSPH || High segment protection
 +
|-
 +
| KSRH || High segment relocation
 +
|-
 +
| KSPC || PC save
 +
|-
 +
| KSAD || Relocation window address
 +
|-
 +
| KSRW || Relocation window
 +
|}
 +
 +
and bits in the KSS:
 +
 +
{| class="wikitable"
 +
! Name || Bit !! Description
 +
|-
 +
| KSSER || 100000 || Error
 +
|-
 +
| KSSPV || 40000 || Protection violation
 +
|-
 +
| KSSIV || 20000 || Instruction violation
 +
|}
 +
 +
A "protection block" is 64 bytes.  The "high segment" begins at address 100000 (octal).
 +
 +
In the protection registers, bit 0 means "write protect".  Bit 1 in KSPL means "user trap select".
  
 
==See also==
 
==See also==

Latest revision as of 16:58, 29 February 2024

The KS11 Memory Protection and Relocation option was a UNIBUS option which was apparently DEC's first attempt at an add-on to provide memory management for the PDP-11/20. (Starting with the next PDP-11 model, the PDP-11/45, memory management was standard, so the KS11 became obsolete.) It was almost certainly produced by DEC's Computer Special Systems group.

All documentation on the KS11 has been lost, so other than the name (below), and an amusing story (ditto), almost nothing is known of it for certain. (The story does reveal that Bell Laboratories' KS11 must have been one of the first ones built; certainly the first one used with a KE11-A.) A very early assembly language version of UNIX, probably UNIX Second Edition (UNIX Third Edition had apparently already moved on to the -11/45) used it, but unfortunately that version has been completely lost, otherwise it would be possible to work out from inspecting the source code much of how the KS11 worked.

From the story of the implementation error on handling the KE11-A (an ordinary UNIBUS device, in implementation), the KS11 was apparently not part of the CPU, but a UNIBUS active repeater, placed in the UNIBUS between the CPU, and the main memory and devices on the rest of the the UNIBUS (in the same manner as the KT11-B Paging Option).

In addition, several other things about the KS11 can be deduced from what little we do know. The name indicates that it proved both protection (i.e. it limited the bus addresses to which the user could reference), and also relocation (i.e. the address space visible to the user was not just main memory, as visible to the CPU, but could be moved elsewhere in main memory).

It is not known whether the KS11 also allowed use of more than 56KB of main memory, the capacity of an ordinary -11/20, by mapping part of the UNIBUS address space which the -11/20 CPU can see (i.e. in the 0-56KB range) up to higher addresses, where 'extra' memory is configured. Such a capability would have been trivial to add to something with the KS11's known capabilities, but some one-time users think use of an MX11 might have been needed to add extra main memory.

From memories of several people who worked with the KS11, apparently it did what the KA10 MMU did, i.e. divide the user's address space into two segments, which could be managed independently. The two segments apparently grew towards each other, in the address space, but were stored contiguously in main memory. In addition to mapping addresses around, the KS11 also definitely limited user access to so-called I/O page addresses.

It also reportedly supported some sort of user/kernel mode distinction, which might have require a tie-in to the CPU. But not necessarily; if there was a flip-flop in the KS11 which stored the 'CPU mode' bit, it might be automatically cleared (if being set meant 'in user mode') on all interrupts (which can be seen on the UNIBUS). It is not clear how such a thing would have handled traps, though (for that, the KT11-B used a link to the KA11 CPU, to which minor changes were made). The 'Option and Module List' indicates that the KS11 was only for the -11/20, which might indicate it did have such a tie-in.

Hardware registers

From definitions in MIMIC, we gather the KS11 had eight 16-bit registers.

Name Description
KSS Status
KSPL Low segment protection
KSRL Low segment relocation
KSPH High segment protection
KSRH High segment relocation
KSPC PC save
KSAD Relocation window address
KSRW Relocation window

and bits in the KSS:

Name Bit Description
KSSER 100000 Error
KSSPV 40000 Protection violation
KSSIV 20000 Instruction violation

A "protection block" is 64 bytes. The "high segment" begins at address 100000 (octal).

In the protection registers, bit 0 means "write protect". Bit 1 in KSPL means "user trap select".

See also

External links

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