Difference between revisions of "TX-0"
m (link to relevant chapter in 'Computer Engineering') |
(Add instructions) |
||
(12 intermediate revisions by 3 users not shown) | |||
Line 1: | Line 1: | ||
− | The '''TX-0''' was a [[transistor]] computer (reportedly the first ever built), at the MIT Lincoln laboratory. | + | The '''TX-0''' was a [[transistor]] computer (reportedly the first ever built), at the MIT Lincoln laboratory. It was a predecessor to the [[TX-2]], and an influence on the design of the [[PDP-1]]. It was in some sense a successor to the [[Memory Test Computer]], itself a spin-off of the pioneering [[Whirlwind]]. |
− | {{stub}} | + | For [[input/output|I/O]], it had a [[Flexowriter]], a [[paper tape]] reader and punch, and a [[display]] [[cathode ray tube|CRT]]. The [[front panel]], in addition to the usual operations, had an [[array]] of [[switch]]es which allowed any combination of the bottom 16 [[main memory]] locations to be substituted by a line of switches. |
+ | |||
+ | It had a [[word]] size of 18 [[bit]]s, and its only generally program-accessible [[register]] was the [[accumulator]]. The first two bits of the [[instruction]] were an [[operation code]] (yes, it only has 4 basic instructions); the remaining 16 bits were an [[address]] (or specified the action selected for the "operate" instruction). The instructions were: | ||
+ | |||
+ | {| class="wikitable" | ||
+ | ! Opcode || Instruction || Function | ||
+ | |- | ||
+ | | 00 || STO || Store accumulator contents in memory | ||
+ | |- | ||
+ | | 01 || ADD || Add contents of memory to accumulator | ||
+ | |- | ||
+ | | 10 || TRN || If accumulator is negative, jump | ||
+ | |- | ||
+ | | 11 || OPR || See table below | ||
+ | |} | ||
+ | |||
+ | Values (in octal) for the 'address' field in the 'operate' instruction are: | ||
+ | |||
+ | {| class="wikitable" | ||
+ | ! Value || Name || Action | ||
+ | |- | ||
+ | | 0100000 || CLL || Clear left half of accumulator | ||
+ | |- | ||
+ | | 040000 || CLR || Clear right half of accumulator | ||
+ | |- | ||
+ | | 030000 || Hlt || Halt machine | ||
+ | |- | ||
+ | | 020000 || IOS || 'In-Out Stop' - pause machine for I/O operation | ||
+ | |- | ||
+ | | 07000 || PRH || Punch 6 data holes from accumulator, and the 7th hole | ||
+ | |- | ||
+ | | 06000 || P6H || Punch 6 data holes from accumulator | ||
+ | |- | ||
+ | | 04000 || PNT || Print Flexowriter character from accumulator | ||
+ | |- | ||
+ | | 03000 || R3C || Read 3 characters from Flexowriter into accumulator (shifted between characters) | ||
+ | |- | ||
+ | | 02000 || DIS || Intensify a point specified by the accumulator on the display scope | ||
+ | |- | ||
+ | | 01000 || R1C || Read character from Flexowriter into accumulator | ||
+ | |- | ||
+ | | 0600 || CYR || Rotate the accumulator right one bit | ||
+ | |- | ||
+ | | 0400 || SHR || Shift the accumulator right one bit | ||
+ | |- | ||
+ | | 0200 || MLR || Store the contents of the MBR (below) in the LR (below) | ||
+ | |- | ||
+ | | 0100 || PEN || Read the [[light pen]] [[flip-flop]]s into the accumulator | ||
+ | |- | ||
+ | | 040 || COM || Complement the accumulator | ||
+ | |- | ||
+ | | 020 || PAD || Half-add (XOR) the MBR into the accumulator | ||
+ | |- | ||
+ | | 010 || CRY || Half-add the implied carry into the accumulator | ||
+ | |- | ||
+ | | 04 || TAC || OR the TAC (below) into the accumulator | ||
+ | |- | ||
+ | | 03 || TBR || Store the TBR (below) in the MBR (below) | ||
+ | |- | ||
+ | | 02 || LMB || Store the LR (below) in the MBR | ||
+ | |- | ||
+ | | 01 || AMB || Store the accumulator in the MBR | ||
+ | |} | ||
+ | |||
+ | Many of these can be set together, and perform useful operations. E.g. as a simple example, CLL+CLR clears the accumulator; a more complex one is that AMB+PAD+CRY does a left rotate. | ||
+ | |||
+ | ===Registers=== | ||
+ | |||
+ | These are the registers (not all accessible under program control) in the original design. Later updates changed some register widths and added registers. | ||
+ | |||
+ | {| class="wikitable" | ||
+ | ! Name || Size (bits) || Meaning | ||
+ | |- | ||
+ | | AC || 18 || Accumulator | ||
+ | |- | ||
+ | | MBR || 18 || Memory buffer register | ||
+ | |- | ||
+ | | MAR || 16 || Memory address register | ||
+ | |- | ||
+ | | PC || 16 || Program counter | ||
+ | |- | ||
+ | | IR || 2 || Instruction register | ||
+ | |- | ||
+ | | LR || 18 || Live register | ||
+ | |- | ||
+ | | TBR || 18 || Toggle switch buffer register | ||
+ | |- | ||
+ | | TAC || 18 || Toggle switch accumulator | ||
+ | |} | ||
+ | |||
+ | ==Test mode== | ||
+ | |||
+ | The console has a switch to set '''test mode''' in which operations are taken from the TBR. The operations are similar to regular instructions, but with a different interpretation: | ||
+ | |||
+ | {| class="wikitable" | ||
+ | ! TBR 0-1 || Instruction || Meaning | ||
+ | |- | ||
+ | | 00 || STO ''x'' || Store TAC in memory location ''x''. | ||
+ | |- | ||
+ | | 01 || ADD ''x'' || Add memory location ''x'' to AC. (Check MBR to examine.) | ||
+ | |- | ||
+ | | 10 || TRN ''x'' || Change to '''normal mode''' and start running at location ''x''. | ||
+ | |- | ||
+ | | 11 || OPR ''x'' || Execute the instruction. | ||
+ | |} | ||
+ | |||
+ | {{semi-stub}} | ||
==External links== | ==External links== | ||
− | * [http://bitsavers.org/pdf/mit/tx-0/ Bitsavers | + | * [http://bitsavers.org/pdf/mit/tx-0/ TX-0] - documents at [[Bitsavers]] |
+ | ** [http://bitsavers.org/pdf/mit/tx-0/6M-4789-1_TX0_funcDescr.pdf A Functional Description of the TX-0 Computer] | ||
+ | ** [http://bitsavers.org/pdf/mit/tx-0/TX-0_history_1984.txt TX-0 history] | ||
+ | * [https://dspace.mit.edu/bitstream/handle/1721.1/4132/RLE-TR-627-42827671.pdf RLE-TR-627 TX-0 Computer History] | ||
+ | * [https://webmuseum.mit.edu/detail.php?module=subjects&type=related&kv=288 TX-0] - has some images | ||
+ | * [https://www.computerhistory.org/pdp-1/2e1b209cb40237b91228cdf26a60e3f8/ MIT TX-0 Computer] | ||
* C. Gordon Bell, Gerald Butler, Robert Gray, John E. Mcnamara, Donald Vonada, and Ronald Wilson, [http://gordonbell.azurewebsites.net/Computer_Engineering/00000146.htm The PDP-1 and Other 18-Bit Computers], in C. Gordon Bell, J. Craig Mudge, John. E. McNamara, ''Computer Engineering: A DEC View of Hardware Systems Design'', Digital Press, Bedford, 1978 - Some material on the TX-0, and also covers its descendants (including the [[PDP-1]]) | * C. Gordon Bell, Gerald Butler, Robert Gray, John E. Mcnamara, Donald Vonada, and Ronald Wilson, [http://gordonbell.azurewebsites.net/Computer_Engineering/00000146.htm The PDP-1 and Other 18-Bit Computers], in C. Gordon Bell, J. Craig Mudge, John. E. McNamara, ''Computer Engineering: A DEC View of Hardware Systems Design'', Digital Press, Bedford, 1978 - Some material on the TX-0, and also covers its descendants (including the [[PDP-1]]) | ||
* [https://www.digibarn.com/stories/linc/documents/LINC-Personal-Workstation/LINC-Personal-Workstation.pdf The LINC Was Early and Small] - lengthy personal memoir by Wesley Clark; it also covers the TX-0 | * [https://www.digibarn.com/stories/linc/documents/LINC-Personal-Workstation/LINC-Personal-Workstation.pdf The LINC Was Early and Small] - lengthy personal memoir by Wesley Clark; it also covers the TX-0 | ||
− | [[Category: Computers]] | + | [[Category: Early Computers]] |
+ | [[Category: 18-bit Computers]] | ||
+ | [[Category: Unique Computers]] |
Latest revision as of 23:25, 19 March 2024
The TX-0 was a transistor computer (reportedly the first ever built), at the MIT Lincoln laboratory. It was a predecessor to the TX-2, and an influence on the design of the PDP-1. It was in some sense a successor to the Memory Test Computer, itself a spin-off of the pioneering Whirlwind.
For I/O, it had a Flexowriter, a paper tape reader and punch, and a display CRT. The front panel, in addition to the usual operations, had an array of switches which allowed any combination of the bottom 16 main memory locations to be substituted by a line of switches.
It had a word size of 18 bits, and its only generally program-accessible register was the accumulator. The first two bits of the instruction were an operation code (yes, it only has 4 basic instructions); the remaining 16 bits were an address (or specified the action selected for the "operate" instruction). The instructions were:
Opcode | Instruction | Function |
---|---|---|
00 | STO | Store accumulator contents in memory |
01 | ADD | Add contents of memory to accumulator |
10 | TRN | If accumulator is negative, jump |
11 | OPR | See table below |
Values (in octal) for the 'address' field in the 'operate' instruction are:
Value | Name | Action |
---|---|---|
0100000 | CLL | Clear left half of accumulator |
040000 | CLR | Clear right half of accumulator |
030000 | Hlt | Halt machine |
020000 | IOS | 'In-Out Stop' - pause machine for I/O operation |
07000 | PRH | Punch 6 data holes from accumulator, and the 7th hole |
06000 | P6H | Punch 6 data holes from accumulator |
04000 | PNT | Print Flexowriter character from accumulator |
03000 | R3C | Read 3 characters from Flexowriter into accumulator (shifted between characters) |
02000 | DIS | Intensify a point specified by the accumulator on the display scope |
01000 | R1C | Read character from Flexowriter into accumulator |
0600 | CYR | Rotate the accumulator right one bit |
0400 | SHR | Shift the accumulator right one bit |
0200 | MLR | Store the contents of the MBR (below) in the LR (below) |
0100 | PEN | Read the light pen flip-flops into the accumulator |
040 | COM | Complement the accumulator |
020 | PAD | Half-add (XOR) the MBR into the accumulator |
010 | CRY | Half-add the implied carry into the accumulator |
04 | TAC | OR the TAC (below) into the accumulator |
03 | TBR | Store the TBR (below) in the MBR (below) |
02 | LMB | Store the LR (below) in the MBR |
01 | AMB | Store the accumulator in the MBR |
Many of these can be set together, and perform useful operations. E.g. as a simple example, CLL+CLR clears the accumulator; a more complex one is that AMB+PAD+CRY does a left rotate.
Registers
These are the registers (not all accessible under program control) in the original design. Later updates changed some register widths and added registers.
Name | Size (bits) | Meaning |
---|---|---|
AC | 18 | Accumulator |
MBR | 18 | Memory buffer register |
MAR | 16 | Memory address register |
PC | 16 | Program counter |
IR | 2 | Instruction register |
LR | 18 | Live register |
TBR | 18 | Toggle switch buffer register |
TAC | 18 | Toggle switch accumulator |
Test mode
The console has a switch to set test mode in which operations are taken from the TBR. The operations are similar to regular instructions, but with a different interpretation:
TBR 0-1 | Instruction | Meaning |
---|---|---|
00 | STO x | Store TAC in memory location x. |
01 | ADD x | Add memory location x to AC. (Check MBR to examine.) |
10 | TRN x | Change to normal mode and start running at location x. |
11 | OPR x | Execute the instruction. |
External links
- TX-0 - documents at Bitsavers
- RLE-TR-627 TX-0 Computer History
- TX-0 - has some images
- MIT TX-0 Computer
- C. Gordon Bell, Gerald Butler, Robert Gray, John E. Mcnamara, Donald Vonada, and Ronald Wilson, The PDP-1 and Other 18-Bit Computers, in C. Gordon Bell, J. Craig Mudge, John. E. McNamara, Computer Engineering: A DEC View of Hardware Systems Design, Digital Press, Bedford, 1978 - Some material on the TX-0, and also covers its descendants (including the PDP-1)
- The LINC Was Early and Small - lengthy personal memoir by Wesley Clark; it also covers the TX-0