Difference between revisions of "MS780 Memory System"
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| − | The '''MS780 Memory System''' was a [[Dynamic RAM|DRAM]] [[main memory]] system for the [[VAX-11/780]]. It was 64 [[bit]]s wide, to interface to the -11/780's [[Synchronous Backplane Interconnect]], and provided [[error-correcting code|ECC]] (8 bits/double-[[word]]), which could correct all single-bit errors. | + | The '''MS780 Memory System''' was a [[Metal Oxide Semiconductor|MOS]] [[Dynamic RAM|DRAM]] [[main memory]] system for the [[VAX-11/780]]. It was 64 [[bit]]s wide, to interface to the -11/780's [[Synchronous Backplane Interconnect]], and provided [[error-correcting code|ECC]] (8 bits/double-[[word]]), which could correct all single-bit errors. |
An MS780 was comprised of a custom [[backplane]], a small group of control cards, and a variable number of array cards (between 2 and 16 per MS780), holding the DRAM [[integrated circuit|chips]]. There were two generations; the first included: | An MS780 was comprised of a custom [[backplane]], a small group of control cards, and a variable number of array cards (between 2 and 16 per MS780), holding the DRAM [[integrated circuit|chips]]. There were two generations; the first included: | ||
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For the original release of the -11/780, with the MS780-C, this produced a maximum of 512 KB per MS780. The -11/780 supported up to 4 MS780 subsystems, for a maximum of 2MB with fully populated MS780-C's. | For the original release of the -11/780, with the MS780-C, this produced a maximum of 512 KB per MS780. The -11/780 supported up to 4 MS780 subsystems, for a maximum of 2MB with fully populated MS780-C's. | ||
| − | It was possible to [[interleaving|interleave]] two MS780's to improve performance. | + | It was possible to [[memory interleaving|interleave]] two MS780's to improve performance. |
==Implementation== | ==Implementation== | ||
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* [http://www.bitsavers.org/pdf/dec/vax/780/EK-MS780-TD-001_MS780_Technical_Manual_197808.pdf MS780-E MS780-H Memory Subsystem Technical Description] (EK-MS780-TD-001) | * [http://www.bitsavers.org/pdf/dec/vax/780/EK-MS780-TD-001_MS780_Technical_Manual_197808.pdf MS780-E MS780-H Memory Subsystem Technical Description] (EK-MS780-TD-001) | ||
* [http://www.bitsavers.org/pdf/dec/vax/780/MP01759_MS780H_Jun84.pdf 11/780 Memory Assembly (MS780-H) Field Maintenance Print Set] (MP01759) | * [http://www.bitsavers.org/pdf/dec/vax/780/MP01759_MS780H_Jun84.pdf 11/780 Memory Assembly (MS780-H) Field Maintenance Print Set] (MP01759) | ||
| + | * [http://bitsavers.org/pdf/dec/vax/780/EK-SI780-IN-002_VAX-11_780_Installation_Manual_198201.pdf VAX-11/780 Installation Manual] (EK-SI780-IN-002) - contains a section on the MS780, Chapter 8 (on pp. 67-70 of the PDF) | ||
* [https://decdoc.itsx.net/dec94mds/1178xrva.txt VAX 11/780 & 11/782 Revision Control Document] - contains module revision histories for all variants of the MS780 | * [https://decdoc.itsx.net/dec94mds/1178xrva.txt VAX 11/780 & 11/782 Revision Control Document] - contains module revision histories for all variants of the MS780 | ||
* [https://www.computerhistory.org/collections/catalog/XD148.80B VAX prototype memory SBI board M8214] | * [https://www.computerhistory.org/collections/catalog/XD148.80B VAX prototype memory SBI board M8214] | ||
[[Category: VAX Memories]] | [[Category: VAX Memories]] | ||
| + | [[Category: SBI]] | ||
Latest revision as of 19:54, 15 May 2024
The MS780 Memory System was a MOS DRAM main memory system for the VAX-11/780. It was 64 bits wide, to interface to the -11/780's Synchronous Backplane Interconnect, and provided ECC (8 bits/double-word), which could correct all single-bit errors.
An MS780 was comprised of a custom backplane, a small group of control cards, and a variable number of array cards (between 2 and 16 per MS780), holding the DRAM chips. There were two generations; the first included:
- MS780-A (sometimes given as MS780A): 4Kx1 DRAM chips, 64KB per array card
- MS780-C: 16Kx1 DRAM chips, 256KB per array card
(The MS780-B and MS780-D are additional array cards for the MS780-A and MS780-C, respectively.) The second generation includes:
- MS780-E: 64Kx1 DRAM chips, 1MB per array card
- MS780-H: 256Kx1 DRAM chips, 4MB per array card
(Similarly, the MS780-F and MS780-J are additional array cards for the MS780-E and MS780-H, respectively.)
For the original release of the -11/780, with the MS780-C, this produced a maximum of 512 KB per MS780. The -11/780 supported up to 4 MS780 subsystems, for a maximum of 2MB with fully populated MS780-C's.
It was possible to interleave two MS780's to improve performance.
Implementation
All versions were implemented on super hex cards (DEC's first use of this form factor), mounted in a custom 20-slot backplane.
The initial versions, the MS780-A and MS780-C, included:
| Slot | Board | Acronym | Function |
|---|---|---|---|
| 20 | M8214 | MSB | SBI Interface |
| 19 | M8213 | MCN | Control and Timing |
| 18 | M8212 | MDT | Data Paths |
Slots 2-17 held 256-Kbyte M8210 (MS780-C) or 64-Kbyte M8211 (MS780-A) array cards; a minimum of two, in slots 16 and 17, were required. The backplane was DEC part number 70-13625.
The later versions, the MS780-E and MS780-H, were implemented using a different card set mounted in a different custom 20-slot backplane (DEC part number 70-19729-00):
| Slot | Board | Acronym | Function |
|---|---|---|---|
| 10 | M8375 | MCN | Control (lower) |
| 11 | M8376 | MSB | SBI Interface |
| 12 | M8375 | MCN | Control (upper) |
Slots 2-9 and 13-20 held 1-Mbyte M8373 (MS780-E) or 4-Mbyte M8374 (MS780-H) array cards; a minimum of two, in slots 9 and 13, were required.
External links
- MS780-E MS780-H Memory Subsystem Technical Description (EK-MS780-TD-001)
- 11/780 Memory Assembly (MS780-H) Field Maintenance Print Set (MP01759)
- VAX-11/780 Installation Manual (EK-SI780-IN-002) - contains a section on the MS780, Chapter 8 (on pp. 67-70 of the PDF)
- VAX 11/780 & 11/782 Revision Control Document - contains module revision histories for all variants of the MS780
- VAX prototype memory SBI board M8214
