Difference between revisions of "Motorola MC68020"
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| name = MC68020 | | name = MC68020 | ||
| manufacturer = [[Motorola]] | | manufacturer = [[Motorola]] | ||
| − | | family = | + | | family = [[Motorola M68000 Family]] |
| architecture = 32-bit | | architecture = 32-bit | ||
| address bus = 32-bit | | address bus = 32-bit | ||
| Line 8: | Line 8: | ||
| year introduced = 1984 | | year introduced = 1984 | ||
| cache = 256 byte icache | | cache = 256 byte icache | ||
| − | | registers = 15 | + | | registers = 15 general 32-bit registers (8 data, 7 address) |
| clock speed = 12.5 MHz - 33.33 MHz | | clock speed = 12.5 MHz - 33.33 MHz | ||
}} | }} | ||
| + | The '''Motorola MC68020''' is a 32-[[bit]] [[microprocessor]] in the [[Motorola M68000 Family]], the first of the second generation in that family, with a full 32-bit implementation throughout (including the [[data bus]]). | ||
| − | + | Earlier members were the [[Motorola MC68000|68000]], [[MC68008|68008]], [[Motorola MC68010|68010]], and [[Motorola MC68012|68012]]. Later members include the [[Motorola MC68030|68030]], [[Motorola MC68040|68040]] and [[Motorola MC68060|68060]]. | |
| − | Earlier members were the [[MC68000|68000]], [[MC68008|68008]] | ||
| − | Later members include the [[MC68030|68030]], [[MC68040|68040]] and [[MC68060|68060]]. | ||
| − | {{ | + | Performance was increased by the use of [[pipeline|pipelining]] and [[cache|caching]]; the MC68020 included a three-stage pipeline, along with a 256-byte cache (for instructions only). It also had a companion [[floating point]] chip, the [[MC68881]], which provided IEEE-compatiable floating point. |
| − | [[Category:Microprocessors]] | + | |
| + | {{semi-stub}} | ||
| + | |||
| + | ==External links== | ||
| + | |||
| + | * [http://www.bitsavers.org/components/motorola/68000/ 68000] - documentation at [[Bitsavers]] | ||
| + | ** [http://www.bitsavers.org/components/motorola/68000/MC68020_32-Bit_Microprocessor_Users_Manual_1984.pdf MC68020 32-Bit Microprocessor User's Manual] | ||
| + | |||
| + | [[Category: Motorola Microprocessors]] | ||
Latest revision as of 16:34, 12 July 2023
| MC68020 | |
| Family: | Motorola M68000 Family |
|---|---|
| Architecture: | 32-bit |
| Manufacturer: | Motorola |
| Year Introduced: | 1984 |
| Address bus: | 32-bit |
| Data bus: | 32-bit (but can work with 8- or 16-bit buses) |
| Number of registers: | 15 general 32-bit registers (8 data, 7 address) |
| Cache: | 256 byte icache |
| Clock Speed: | 12.5 MHz - 33.33 MHz |
The Motorola MC68020 is a 32-bit microprocessor in the Motorola M68000 Family, the first of the second generation in that family, with a full 32-bit implementation throughout (including the data bus).
Earlier members were the 68000, 68008, 68010, and 68012. Later members include the 68030, 68040 and 68060.
Performance was increased by the use of pipelining and caching; the MC68020 included a three-stage pipeline, along with a 256-byte cache (for instructions only). It also had a companion floating point chip, the MC68881, which provided IEEE-compatiable floating point.
