Difference between revisions of "Camintonn CMV-4000"
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| − | The '''Camintonn CMV-1000''' and '''CMV-4000''' are a pair of [[QBUS]] memory cards, in [[DEC card form factor|quad]] | + | The '''Camintonn CMV-1000''' and '''CMV-4000''' are a pair of [[QBUS]] [[main memory]] cards, in [[DEC card form factor|quad-size]] format, with capacities of 1M-[[byte]] and 4M-bytes, respectively. They both use the same [[printed circuit board|PCB]], and have capacities of 1M-byte when using 64Kx1 [[dynamic RAM|DRAM]] [[integrated circuit|chips]], or 4M-bytes when using 256Kx1 DRAMs. |
==Configuration== | ==Configuration== | ||
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==Repair== | ==Repair== | ||
| − | Although no documentation is currently known for this card, since this card has eight banks (i.e. it has a 8x18 | + | Although no documentation is currently known for this card, since this card has eight banks (i.e. it has a 8x18 arrays of xx64 or xx256 chips, to provide 16 bits wide plus byte [[parity]]; there are eight arrays of 18 chips), it is sometimes possible to repair problems in one, if the problem is a faulty DRAM chip. |
| − | If one bank is picking or dropping bit(s), and the others are not, that meant that data paths | + | If one bank is picking or dropping bit(s), and the others are not, that meant that data paths are all OK, and it is a simple matter of finding and replacing the bad memory chip(s). |
| − | By pulling memory chips (luckily, they were socketed on the board of this type which was examined to create this page, so the process was fairly painless), it was possible to work out which bits are stored in which chips. (Unlike many memory cards, it's not semi-random.) | + | By pulling memory chips (luckily, they were [[chip socket|socketed]] on the board of this type which was examined to create this page, so the process was fairly painless), it was possible to work out which bits are stored in which chips. (Unlike many memory cards, it's not semi-random.) |
The card has 18 columns, labeled '0'-'7', 'P0', '8'-'15', and 'P1'. These are exactly like what they sound like: the 16 bits of a word, plus a parity bit for each byte. The exact bit to chip correspondence is: | The card has 18 columns, labeled '0'-'7', 'P0', '8'-'15', and 'P1'. These are exactly like what they sound like: the 16 bits of a word, plus a parity bit for each byte. The exact bit to chip correspondence is: | ||
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| − | Similarly, there are 8 rows of memory chips, labelled 'A' through 'H', | + | Similarly, there are 8 rows of memory chips, labelled 'A' through 'H', and these are the banks, with 'A' being that at the lowest address on the card. The exact addresses are: |
| − | and these are the banks, with 'A' being that at the lowest address on | ||
| − | the card. The exact addresses are: | ||
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| − | + | [[Category: QBUS Memories]] | |
Latest revision as of 16:33, 13 January 2022
The Camintonn CMV-1000 and CMV-4000 are a pair of QBUS main memory cards, in quad-size format, with capacities of 1M-byte and 4M-bytes, respectively. They both use the same PCB, and have capacities of 1M-byte when using 64Kx1 DRAM chips, or 4M-bytes when using 256Kx1 DRAMs.
Configuration
No original Camintonn documentation is currently available; configuration information will therefore provided here shortly.
Repair
Although no documentation is currently known for this card, since this card has eight banks (i.e. it has a 8x18 arrays of xx64 or xx256 chips, to provide 16 bits wide plus byte parity; there are eight arrays of 18 chips), it is sometimes possible to repair problems in one, if the problem is a faulty DRAM chip.
If one bank is picking or dropping bit(s), and the others are not, that meant that data paths are all OK, and it is a simple matter of finding and replacing the bad memory chip(s).
By pulling memory chips (luckily, they were socketed on the board of this type which was examined to create this page, so the process was fairly painless), it was possible to work out which bits are stored in which chips. (Unlike many memory cards, it's not semi-random.)
The card has 18 columns, labeled '0'-'7', 'P0', '8'-'15', and 'P1'. These are exactly like what they sound like: the 16 bits of a word, plus a parity bit for each byte. The exact bit to chip correspondence is:
| Bit | Column |
|---|---|
| 01 | 0 |
| ... | |
| 0200 | 7 |
| 0400 | 8 |
| ... | |
| 0100000 | 15 |
Similarly, there are 8 rows of memory chips, labelled 'A' through 'H', and these are the banks, with 'A' being that at the lowest address on the card. The exact addresses are:
| Row | Bank starting address | |
|---|---|---|
| CMV-1000 | CMV-4000 | |
| A | 0 | 0 |
| B | 0400000 | 02000000 |
| C | 1000000 | 04000000 |
| D | 1400000 | 06000000 |
| E | 2000000 | 10000000 |
| F | 2400000 | 12000000 |
| G | 3000000 | 14000000 |
| H | 3400000 | 16000000 |
