Difference between revisions of "MM11-D core memory"
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| − | + | [[Image:MM11-DFront.jpg|350px|thumb|right|MM11-D set, showing the G652 mother-board]] | |
| − | * An H222-A daughter-board containing the cores | + | The '''MM11-D''' was a 32 Kbyte [[core memory|core]] [[main memory]] for [[PDP-11]] [[UNIBUS]] machines. An MM11-D was composed of two [[DEC card form factor|hex]] boards, one piggy-backed on the other, and the pair taking only a single [[backplane]] slot (electrically): |
| − | * A G652 mother-board containing most of the electronics, and the contact fingers for plugging into a [[backplane]] | + | |
| + | * An H222-A [[daughter-board]] containing the cores | ||
| + | * A G652 mother-board containing most of the electronics, and the contact fingers for plugging into a [[backplane]] slot | ||
The MM11-D did not use a custom backplane; it plugged into a standard [[Modified UNIBUS Device|MUD slot]]. The pair was 'thick' enough that a normal board cannot be plugged into the next slot; instead, a [[G727 grant continuity card]] must be used there (since it has no components on it, it just clears the H222-A card). | The MM11-D did not use a custom backplane; it plugged into a standard [[Modified UNIBUS Device|MUD slot]]. The pair was 'thick' enough that a normal board cannot be plugged into the next slot; instead, a [[G727 grant continuity card]] must be used there (since it has no components on it, it just clears the H222-A card). | ||
| − | There was also a parity-capable variant, the '''MM11-DP''', which | + | There was also a parity-capable variant, the '''MM11-DP''', which used an [[M7850 parity controller]] plugged into the same backplane as the MM11-D, and substituted a core array with two more bits per word. |
| − | It is possible to [[interleave]] a pair of MM11-D's to provide reduced effective [[ | + | It is possible to [[memory interleaving|interleave]] a pair of MM11-D's to provide reduced effective average [[access time]]s. |
==Configuration== | ==Configuration== | ||
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They are on the G652 board, on the center right (with the board upright, with the contact fingers at the bottom). W1 is the jumper on the right (toward the edge of the board), and W8 is the one on the left (toward the center of the board), with the others in order between them. | They are on the G652 board, on the center right (with the board upright, with the contact fingers at the bottom). W1 is the jumper on the right (toward the edge of the board), and W8 is the one on the left (toward the center of the board), with the others in order between them. | ||
| − | + | ==External links== | |
| + | |||
| + | * [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/EK-MM11D-OP-001%20MM11-D&DP%20Core%20Memory%20User's%20Manual.pdf MM11-D/DP core memory user's manual] (EK-MM11D-OP-001) | ||
| + | * [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/EK-MM11D-TM-001%20MM11-D&DP%20Core%20Memory%20Manual.pdf MM11-D/DP core memory manual] (EK-MM11D-TM-001) | ||
| + | * [http://www.bitsavers.org/pdf/dec/pdp11/1134/MP00082_1134_Vol2_Sep76.pdf 11/34 Vol. 2 Field Maintenance Print Set] - the MM11-D is covered on pp. 70-92 of the PDF | ||
| + | |||
| + | [[Category: UNIBUS Memories]] | ||
Latest revision as of 18:54, 30 July 2023
The MM11-D was a 32 Kbyte core main memory for PDP-11 UNIBUS machines. An MM11-D was composed of two hex boards, one piggy-backed on the other, and the pair taking only a single backplane slot (electrically):
- An H222-A daughter-board containing the cores
- A G652 mother-board containing most of the electronics, and the contact fingers for plugging into a backplane slot
The MM11-D did not use a custom backplane; it plugged into a standard MUD slot. The pair was 'thick' enough that a normal board cannot be plugged into the next slot; instead, a G727 grant continuity card must be used there (since it has no components on it, it just clears the H222-A card).
There was also a parity-capable variant, the MM11-DP, which used an M7850 parity controller plugged into the same backplane as the MM11-D, and substituted a core array with two more bits per word.
It is possible to interleave a pair of MM11-D's to provide reduced effective average access times.
Configuration
The DEC manuals for the MM11-D list the jumpers used to configure the MM11-D, but they do not show their location, and the board does not contain captions for the jumpers.
They are on the G652 board, on the center right (with the board upright, with the contact fingers at the bottom). W1 is the jumper on the right (toward the edge of the board), and W8 is the one on the left (toward the center of the board), with the others in order between them.
External links
- MM11-D/DP core memory user's manual (EK-MM11D-OP-001)
- MM11-D/DP core memory manual (EK-MM11D-TM-001)
- 11/34 Vol. 2 Field Maintenance Print Set - the MM11-D is covered on pp. 70-92 of the PDF
