Difference between revisions of "LSI-11 Bus interface chips"
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The '''LSI-11 Bus interface chips''' were a set of custom [[integrated circuit|chips]] produced by [[Digital Equipment Corporation|DEC]] for use in [[device controller]]s for the [[QBUS]]; some were also used in [[main memory]] and [[Central Processing Unit|CPU]] cards. Physically, they were 18- and 20-pin [[Dual Inline Package|DIPs]] (DC003 - 18; the others are 20). | The '''LSI-11 Bus interface chips''' were a set of custom [[integrated circuit|chips]] produced by [[Digital Equipment Corporation|DEC]] for use in [[device controller]]s for the [[QBUS]]; some were also used in [[main memory]] and [[Central Processing Unit|CPU]] cards. Physically, they were 18- and 20-pin [[Dual Inline Package|DIPs]] (DC003 - 18; the others are 20). | ||
| − | * | + | * DC003 - Dual-[[Interrupt]] Logic ([[DEC part number]] 19-12730-00) |
| − | * | + | * DC004 - Register Selector (Protocol) Logic (19-12729-00) |
| − | * | + | * DC005 - Quad Bus Transceiver (19-13040-00) - includes [[address]] matching and [[interrupt vector]] transmission |
* DC006 - Word Count/Bus Address Logic (19-14035-00) | * DC006 - Word Count/Bus Address Logic (19-14035-00) | ||
* DC010 - [[Direct Memory Access]] Logic (19-14038-00) | * DC010 - [[Direct Memory Access]] Logic (19-14038-00) | ||
| Line 17: | Line 17: | ||
* [http://www.bitsavers.org/pdf/dec/qbus/Chipkit_Users_Manual_1982.pdf chipkit users manual: LSI-11 Bus Interface Chips and Accessories] <!-- also http://www.chdickman.com/qbus_ide/chipkit.pdf --> | * [http://www.bitsavers.org/pdf/dec/qbus/Chipkit_Users_Manual_1982.pdf chipkit users manual: LSI-11 Bus Interface Chips and Accessories] <!-- also http://www.chdickman.com/qbus_ide/chipkit.pdf --> | ||
| + | * [http://www.bitsavers.org/pdf/dec/qbus/Digital_Microcomputer_Products_Handbook_1985.pdf Microcomputer Products Handbook] - these are covered in Appendix A, "Chip Kits" (pp. 581-584 of the PDF) | ||
* [http://www.bitsavers.org/pdf/dec/internal/Semiconductor_Handbook_V1_1987.pdf DEC Semiconductor Databook, Volume 1], pp. 763-818; 833-844 (4-213–4-268; 4-283–4-294) | * [http://www.bitsavers.org/pdf/dec/internal/Semiconductor_Handbook_V1_1987.pdf DEC Semiconductor Databook, Volume 1], pp. 763-818; 833-844 (4-213–4-268; 4-283–4-294) | ||
* [http://www.bitsavers.org/pdf/dec/qbus/EK-DZV11-TM-001_DZV11_Asynchronous_Multiplexer_Technical_Manual_Jun78.pdf DZV11 asynchronous multiplexer technical manual] (EK-DZV11-TM-001) | * [http://www.bitsavers.org/pdf/dec/qbus/EK-DZV11-TM-001_DZV11_Asynchronous_Multiplexer_Technical_Manual_Jun78.pdf DZV11 asynchronous multiplexer technical manual] (EK-DZV11-TM-001) | ||
[[Category: QBUS]] | [[Category: QBUS]] | ||
| − | [[Category: | + | [[Category: Digital Equipment Corporation]] |
| + | [[Category: Integrated Circuits]] | ||
Latest revision as of 23:40, 12 July 2023
The LSI-11 Bus interface chips were a set of custom chips produced by DEC for use in device controllers for the QBUS; some were also used in main memory and CPU cards. Physically, they were 18- and 20-pin DIPs (DC003 - 18; the others are 20).
- DC003 - Dual-Interrupt Logic (DEC part number 19-12730-00)
- DC004 - Register Selector (Protocol) Logic (19-12729-00)
- DC005 - Quad Bus Transceiver (19-13040-00) - includes address matching and interrupt vector transmission
- DC006 - Word Count/Bus Address Logic (19-14035-00)
- DC010 - Direct Memory Access Logic (19-14038-00)
- DC021 - Octal Bus Transceiver (19-19015-00)
Details
The DZV11 technical manual (below) includes detailed descriptions of many of the LSI-11 Bus interface chips in Appendix A, 'IC Descriptions'.
External links
- chipkit users manual: LSI-11 Bus Interface Chips and Accessories
- Microcomputer Products Handbook - these are covered in Appendix A, "Chip Kits" (pp. 581-584 of the PDF)
- DEC Semiconductor Databook, Volume 1, pp. 763-818; 833-844 (4-213–4-268; 4-283–4-294)
- DZV11 asynchronous multiplexer technical manual (EK-DZV11-TM-001)
