Difference between revisions of "DUV11 Line Interface"

From Computer History Wiki
Jump to: navigation, search
(Fairly complete (from what little info is available))
 
m (New cat)
Line 102: Line 102:
  
 
[[Category: QBUS Serial Interfaces]]
 
[[Category: QBUS Serial Interfaces]]
 +
[[Category: DEC Synchronous Serial Interfaces]]

Revision as of 20:22, 15 August 2022

The DUV11 Line Interface is a synchronous serial line interface for the QBUS. It used programmed I/O (with separate receive and transmit interrupts) to transfer data; it was double-buffered for both input and output.

It provided an EIA RS-232 interface (to Bell 200 series modems, such as the model 201, and equivalents). Baud rates of up to 9.6K bits/second were supported by the EIA interface.

The character length (5, 6, 7 or 8 bits), and the sync character, were selectable; parity (even or odd) was optionally supported for error detection. It could also be set to discard additional incoming sync characters; it could operate in either half-duplex or full-duplex mode. All configuration, as well as all the modem control leads, could be set under program control. A switch allows configuration of whether one or two contiguous sync characters is needed for synchronization.

It was a quad-width card, the M7591; a Berg header on the card provided the 'native' EIA interface. For operation without a modem, an external clock could be used; a switch-selectable option also allowed the use of an internal clock.

Registers

Register Abbreviation Address
Receiver Status Register RxCSR 16xx10
Receiver Data Buffer Register (read only) RxDBUF 16xx12
Parameter Control Register (write only) PARCSR 16xx12
Transmitter Status Register TxCSR 16xx14
Transmitter Data Buffer Register TxDBUF 16xx16

The address should be allocated from the floating device address space‎; it is factory-configured to 0160010. It uses a single interrupt vector (for 'done'), which should be allocated from the floating device vectors‎; it is factory-configured to 0440.

See also