Difference between revisions of "MMV11-A QBUS core memory"
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The MMV11-A was a [[QBUS#Variable_address_size|Q16]] card, so could only be used on systems with a maximum of 64KB of memory. | The MMV11-A was a [[QBUS#Variable_address_size|Q16]] card, so could only be used on systems with a maximum of 64KB of memory. | ||
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| + | ==See also== | ||
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| + | * [[QBUS memories]] | ||
[[Category: QBUS Memories]] | [[Category: QBUS Memories]] | ||
Revision as of 17:22, 31 July 2022
MMV11-A is a core main memory module for the QBUS - the only core main memory from DEC for the QBUS.
An MMV11-A holds 8K bytes; it has an access time of 425 nsec, and a cycle time of 1.15 μsec.
An MMV11-A was composed of two quad-sized boards, one piggy-backed on the other, and the pair taking only a single backplane slot (electrically):
- An H223 daughter-board containing the cores
- A G653 mother-board containing most of the electronics, and the contact fingers for plugging into the backplane.
The MMV11-A did not use a custom backplane; it plugged into a standard Q/Q backplane. However, it did use QBUS signals on the right-hand C/D connectors, so it could not be plugged into a Q/CD backplane.
The pair was 'thick' enough that a normal board cannot be plugged into the next slot. DEC documentation indicates that if there are devices 'behind' the MMV11-A on the bus, the bus grant lines (BIAK and BDMG) must be jumpered on the backplane in that slot.
The MMV11-A was a Q16 card, so could only be used on systems with a maximum of 64KB of memory.
