Difference between revisions of "KA650 CPU"
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The KA650 is implemented using the [[CVAX]] with [[floating point]] [[instruction]] support provided by the [[CFPA]], [[main memory]] control provided by [[CMCTL]], and various system support functions by the [[SSC]]. | The KA650 is implemented using the [[CVAX]] with [[floating point]] [[instruction]] support provided by the [[CFPA]], [[main memory]] control provided by [[CMCTL]], and various system support functions by the [[SSC]]. | ||
| + | |||
| + | There are two versions of the KA650: | ||
| + | * KA650-A (M7620-A): Time-Sharing CPU | ||
| + | * KA650-B (M7620-B): Workstation / Server CPU | ||
| + | |||
| + | The only differences between the two CPUs are the system [[ROM]]s: | ||
| + | * KA650-A: 23-192E7 and 23-193E7 | ||
| + | * KA650-B: 23-194E7 and 23-195E7 | ||
| + | |||
| + | You need different VMS software licenses for the two KA650 versions. | ||
| + | |||
| + | For information on KA650 revisions and compatible options see: [[KA650 Revision Control]]. | ||
==Memory Subsystem== | ==Memory Subsystem== | ||
Revision as of 10:32, 17 June 2022
| KA650 | |
| Summary | |
|---|---|
| OS support (VMS): | V4.7A or later |
| OS support (ULTRIX): | ULTRIX V2.2 |
| CPU Details | |
| CPU name (VMS): | KA650 |
| CPU module: | KA650 |
| Module: | M7620 [3] |
| Number of processors: | 1 |
| VMS DCL CPU: | 10 |
| VMS DCL XCPU: | 1 |
| SID: | 0A000005 |
| XSID: | 01530101 |
| CPU chip: | 78034 (CVAX) [1] |
| FPU chip: | 78132 |
| CPU technology: | CMOS |
| CPU cycle time: | 90ns [4] |
| Instruction-buffer: | 12 bytes [1] |
| Translation-buffer: | 28 entries [1] |
| Cache: | 1KB (90ns) [1] |
| Backup cache: | 64KB (180ns longword, 270ns quadword) [4] |
| Compatibility mode: | No |
| Console processor: | CPU |
| Console device: | None |
| Firmware version: | V5.3 |
| Console speed: | 300 to 38400 |
| Memory | |
| Minimum memory: | 8MB |
| Maximum memory: | 64MB |
| Memory checking: | 32 + 7 bit ECC [4] |
| Memory cycle: | 450ns longword, 720ns quadword [4] |
| I/O | |
| Q-bus: | 1 @ 3.3MB/s |
| Performance | |
| VUPs: | 2.7 [2] |
The KA650 is the CPU used in DEC's MicroVAX III. It is a single quad-height PCB which plugs into a QBUS backplane. [4]
The KA650 is implemented using the CVAX with floating point instruction support provided by the CFPA, main memory control provided by CMCTL, and various system support functions by the SSC.
There are two versions of the KA650:
- KA650-A (M7620-A): Time-Sharing CPU
- KA650-B (M7620-B): Workstation / Server CPU
The only differences between the two CPUs are the system ROMs:
- KA650-A: 23-192E7 and 23-193E7
- KA650-B: 23-194E7 and 23-195E7
You need different VMS software licenses for the two KA650 versions.
For information on KA650 revisions and compatible options see: KA650 Revision Control.
Memory Subsystem
The KA650 memory subsystem is detailed elsewhere: KA650 Memory Subsystem.
References
[1] "CVAX-based Systems", Digital Technical Journal, Vol 1 No 7, August 1988.
[2] VAXcluster Systems. Guidelines for VAXCluster System Configurations. EK-VAXCT-CG-006
[3] Field Maintenance Print Set: 650QS Pedestal, BA213. MP-02538-01
[4] KA650 CPU Module Technical Manual. EK-KA650-UG.003
