Difference between revisions of "Small Peripheral Controller"
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SPC slots were wired to bring all 5 UNIBUS grant lines through the device; this was performed in rows C (for NPG) and D (for BGx). The board generally had a header which routed the grant (and matching request) line for the desired priority level to the on-board interrupt circuity, and passed the other grant lines through. The DMA (NPG) grant line generally had a jumper on the backplane, which had to be removed if a DMA device was plugged into the slot. Un-occupied slots needed to have a grant continuity card installed. | SPC slots were wired to bring all 5 UNIBUS grant lines through the device; this was performed in rows C (for NPG) and D (for BGx). The board generally had a header which routed the grant (and matching request) line for the desired priority level to the on-board interrupt circuity, and passed the other grant lines through. The DMA (NPG) grant line generally had a jumper on the backplane, which had to be removed if a DMA device was plugged into the slot. Un-occupied slots needed to have a grant continuity card installed. | ||
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| + | For the pinout of an SPC slot, see [[UNIBUS#Pinout|here]]. | ||
==See Also== | ==See Also== | ||
* [[Modified UNIBUS Device]] | * [[Modified UNIBUS Device]] | ||
Revision as of 20:43, 26 January 2017
Small Peripheral Controller or SPC was DEC's name for an I/O board slot in the backplanes of UNIBUS PDP-11s. It was a quad slot, occupying rows C-F in a hex slot, and could hold any kind of device.
It was originally conceived to hold a dual device-specific card, along with single-height M105 Address Selector and M782 (later M7820 and M7821 revisions) Interrupt Control FLIP CHIPs. The appropriate UNIBUS signal lines (address, data, etc) were thus wired to the appropriate rows/pins in SPC slots. It soon became more cost-effective to fabricate an entire device on a single quad card, but the pinout was retained.
SPC slots were wired to bring all 5 UNIBUS grant lines through the device; this was performed in rows C (for NPG) and D (for BGx). The board generally had a header which routed the grant (and matching request) line for the desired priority level to the on-board interrupt circuity, and passed the other grant lines through. The DMA (NPG) grant line generally had a jumper on the backplane, which had to be removed if a DMA device was plugged into the slot. Un-occupied slots needed to have a grant continuity card installed.
For the pinout of an SPC slot, see here.
