Difference between revisions of "Small Peripheral Controller"
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| − | '''Small Peripheral Controller''' or '''SPC''' was [[DEC]]'s name for an I/O board slot in the [[backplane]]s of [[UNIBUS]] [[PDP-11]]s. It was a [[DEC card form factor|quad]] slot, occupying rows C-F in a hex slot, and could hold any kind of device. | + | '''Small Peripheral Controller''' or '''SPC''' was [[DEC]]'s name for an I/O board slot in the [[backplane]]s of [[UNIBUS]] [[PDP-11]]s. It was a [[DEC card form factor|quad]] slot, occupying [[DEC edge connector contact identification|rows C-F]] in a hex slot, and could hold any kind of device. |
It was originally conceived to hold a dual-height device-specific card, along with single-height M105 Address Selector and M782 (later M7820 and M7821 revisions) Interrupt Control [[FLIP CHIP]]s. The appropriate UNIBUS signal lines (address, data, etc) were thus wired to the appropriate rows/pins in SPC slots. Other pins were wired to allow the necessary communication between the cards, without requiring cables between them. | It was originally conceived to hold a dual-height device-specific card, along with single-height M105 Address Selector and M782 (later M7820 and M7821 revisions) Interrupt Control [[FLIP CHIP]]s. The appropriate UNIBUS signal lines (address, data, etc) were thus wired to the appropriate rows/pins in SPC slots. Other pins were wired to allow the necessary communication between the cards, without requiring cables between them. | ||
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==Grants== | ==Grants== | ||
| − | SPC slots were wired to bring all 5 UNIBUS grant lines through the device; this was performed in rows C (for NPG) and D (for BGx). The board generally had a header which routed the grant (and matching request) line for the desired priority level to the | + | SPC slots were wired to bring all 5 UNIBUS [[bus grant line|grant lines]] through the device; this was performed in rows C (for NPG) and D (for BGx). The device board generally had a header which routed the grant (and matching request) line for the desired priority level to the interrupt circuity, and passed the other grant lines through. |
| − | The DMA (NPG) grant line generally had a jumper on the backplane, which had to be removed if a DMA device was plugged into the slot. Un-occupied slots needed to have a grant continuity card installed. | + | The DMA (NPG) grant line generally had a jumper on the backplane, which had to be removed if a DMA device was plugged into the slot. Un-occupied slots needed to have either a [[G727 grant continuity card|G727]] or a [[G7273 grant continuity card|G7273]] grant continuity card installed. |
==SPC Extensions== | ==SPC Extensions== | ||
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On some systems, some SPC pins were recycled for other purposes. | On some systems, some SPC pins were recycled for other purposes. | ||
| − | In the [[PDP-11/04]] and [[PDP-11/34]], on the backplane which holds the [[CPU]] card(s), along with the [[KY11-LB Programmer's Console]], the CPU and the Programmer's Console do some communication via the backplane. Pins CP1 and CR1 are Halt Request and Halt Grant, respectively; they allow the KY11-B to tell the CPU to halt. | + | In the [[PDP-11/04]] and [[PDP-11/34]], on the backplane which holds the [[CPU]] card(s), along with the [[KY11-LB Programmer's Console]], the [[Central Processing Unit|CPU]] and the Programmer's Console do some communication via the backplane. Pins CP1 and CR1 are Halt Request and Halt Grant, respectively; they allow the KY11-B to tell the CPU to halt. |
==See Also== | ==See Also== | ||
* [[Modified UNIBUS Device]] | * [[Modified UNIBUS Device]] | ||
Revision as of 13:35, 5 January 2018
Small Peripheral Controller or SPC was DEC's name for an I/O board slot in the backplanes of UNIBUS PDP-11s. It was a quad slot, occupying rows C-F in a hex slot, and could hold any kind of device.
It was originally conceived to hold a dual-height device-specific card, along with single-height M105 Address Selector and M782 (later M7820 and M7821 revisions) Interrupt Control FLIP CHIPs. The appropriate UNIBUS signal lines (address, data, etc) were thus wired to the appropriate rows/pins in SPC slots. Other pins were wired to allow the necessary communication between the cards, without requiring cables between them.
It soon became more cost-effective to fabricate an entire device on a single quad card, but the pinout was retained. (For the pinout of an SPC slot, see here.)
Grants
SPC slots were wired to bring all 5 UNIBUS grant lines through the device; this was performed in rows C (for NPG) and D (for BGx). The device board generally had a header which routed the grant (and matching request) line for the desired priority level to the interrupt circuity, and passed the other grant lines through.
The DMA (NPG) grant line generally had a jumper on the backplane, which had to be removed if a DMA device was plugged into the slot. Un-occupied slots needed to have either a G727 or a G7273 grant continuity card installed.
SPC Extensions
On some systems, some SPC pins were recycled for other purposes.
In the PDP-11/04 and PDP-11/34, on the backplane which holds the CPU card(s), along with the KY11-LB Programmer's Console, the CPU and the Programmer's Console do some communication via the backplane. Pins CP1 and CR1 are Halt Request and Halt Grant, respectively; they allow the KY11-B to tell the CPU to halt.
