PDP-8/E: Difference between revisions

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{{Infobox Machine  
{{Infobox Machine  
| name = PDP-8/E
| name = PDP-8/E

Revision as of 13:49, 3 September 2018


PDP-8/E

PDP-8/E front panel
Year Introduced: 1970
Form Factor: minicomputer
Word Size: 12
Logic Type: TTL
Design Type: clocked random logic
Clock Speed: 385KHz
Memory Speed: 1.2 μseconds
Physical Address Size: 32KW (requires optional KM8-E)
Virtual Address Size: 4KW
Memory Management: bank selection, CPU mode
Bus Architecture: OMNIBUS
Operating System: OS/8, TSS/8
Predecessor(s): PDP-8/I
Successor(s): PDP-8/A


The PDP-8/E was an improved model in the PDP-8 line, and introduced the OMNIBUS for interfacing to device controllers.

The PDP-8/F was a cost-reduced version of the -8/E with the same CPU and main memory, but only a single OMNIBUS backplane. The PDP-8/M is the OEM version of the PDP-8/F.

It could perform an addition to the accumulator in 2.6 microseconds, and a 12 by 12 bit multiplication with 24 bit result in 40 microseconds with the math extension hardware.