Difference between revisions of "KT11-D Memory Management Unit"
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| − | The '''KT11-D Memory Management''' was an option for the [[KD11-A CPU]] of the [[PDP-11/40]] which provided [[memory management]]. It did not provide the full [[PDP-11 Memory Management]], but the simplified subset. | + | The '''KT11-D Memory Management''' was an option for the [[KD11-A CPU]] of the [[PDP-11/40]] which provided [[memory management]]. It did not provide the full [[PDP-11 Memory Management]], but the simplified subset; in fact, the KT11-D is the archetype for that subset. |
It was a [[hex]] card (M7236) which plugged into a dedicated, pre-wrired slot in the [[Central Processing Unit|CPU]]'s [[backplane]]. The KT11-D required the [[KJ11-A Stack Limit Register]] option. | It was a [[hex]] card (M7236) which plugged into a dedicated, pre-wrired slot in the [[Central Processing Unit|CPU]]'s [[backplane]]. The KT11-D required the [[KJ11-A Stack Limit Register]] option. | ||
Revision as of 14:55, 21 January 2019
The KT11-D Memory Management was an option for the KD11-A CPU of the PDP-11/40 which provided memory management. It did not provide the full PDP-11 Memory Management, but the simplified subset; in fact, the KT11-D is the archetype for that subset.
It was a hex card (M7236) which plugged into a dedicated, pre-wrired slot in the CPU's backplane. The KT11-D required the KJ11-A Stack Limit Register option.
Further reading
- "KT11-D Memory Management Option Manual", DEC-11-HKTDA-B-D
