KJ11-A Stack Limit Register
From Computer History Wiki
The KJ11-A Stack Limit Register is option for the KD11-A CPU of the PDP-11/40. The basic KD11-A implements stack limit functionality, but at a fixed address (0400); installing the KJ11-A allows the address boundary to be set in a CPU register.
Physically, the KJ11-A is an extended-length single-height coard (M7237), which plugs into a dedicated slot in the CPU's backplane.
| v • d • e PDP-11 Computers and Peripherals |
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| UNIBUS PDP-11s - PDP-11/20 • PDP-11/15 • PDP-11/35 • PDP-11/40 • PDP-11/45 • PDP-11/50 • PDP-11/55 • PDP-11/70 • PDP-11/05 • PDP-11/10 • PDP-11/34 • PDP-11/04 • PDP-11/44 • PDP-11/60 • PDP-11/24 • PDP-11/84 • PDP-11/94
QBUS PDP-11s - PDP-11/03 • PDP-11/23 • PDP-11/23+ • MicroPDP-11/73 • MicroPDP-11/53 • MicroPDP-11/83 • MicroPDP-11/93 Chips: LSI-11 • F-11 • T-11 • J-11 Clones: CM 1420 Also: PDP-11 architecture • PDP-11 Memory Management • PDP-11 stacks • FP11 floating point • UNIBUS • QBUS |
