Difference between revisions of "DM11 Asynchronous 16-line Single-Speed Multiplexer"
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The '''DM11 asynchronous serial line interface''' was a very early [[UNIBUS]] [[peripheral]] which provided up to 16 [[asynchronous serial line]] connections. It was in some sense a predecessor to the [[DH11 asynchronous serial line interface|DH11]], in that it used [[Direct Memory Access|DMA]]. | The '''DM11 asynchronous serial line interface''' was a very early [[UNIBUS]] [[peripheral]] which provided up to 16 [[asynchronous serial line]] connections. It was in some sense a predecessor to the [[DH11 asynchronous serial line interface|DH11]], in that it used [[Direct Memory Access|DMA]]. | ||
| − | However, unlike any other UNIBUS peripheral, much of its internal | + | However, unlike any other UNIBUS peripheral, much of its internal state was actually stored in [[main memory]], with DMA used to gain access to it, not in [[register]]s in the device itself. (Apparently this was early enough in time that [[gate]]s for registers were too expensive.) The data stored in memory included: |
* per-line current output [[buffer]] [[address]] | * per-line current output [[buffer]] [[address]] | ||
* per-line current output transfer length | * per-line current output transfer length | ||
| − | |||
* per-line input shift registers | * per-line input shift registers | ||
| + | * input buffer (a circular [[First-In First-Out buffer|FIFO buffer]]) | ||
| − | The 64-[[character]] FIFO buffer made input over-runs unlikely. There were separate receive and transmit [[interrupt]]s. | + | The 64-[[character]] FIFO buffer made input over-runs unlikely. There were separate receive and transmit [[interrupt]]s, and [[half-duplex]] and [[full-duplex]] operation are supported in [[hardware]]. |
The implementation of the basic '''DM11-AA''' used a double custom [[system unit]] [[backplane]], containing multiple cards; a [[flat cable]] connected this to separate rack-mounted [[DEC card form factor|dual-height]] 'distribution panel' backplane (which required its own independent [[power supply]]). | The implementation of the basic '''DM11-AA''' used a double custom [[system unit]] [[backplane]], containing multiple cards; a [[flat cable]] connected this to separate rack-mounted [[DEC card form factor|dual-height]] 'distribution panel' backplane (which required its own independent [[power supply]]). | ||
| − | Modular 'line conditioning' units from the [[DF11 Communications Line Adapter]] series were installed in the distribution panel to allow support of either [[20mA current loop serial line interface|20mA]] or [[EIA RS-232 serial line interface|EIA RS-232]] serial lines. | + | Modular 'line conditioning' units from the [[DF11 Communications Line Adapter]] series were installed in the distribution panel to allow support of either [[20mA current loop serial line interface|20mA]] or [[EIA RS-232 serial line interface|EIA RS-232]] serial lines. The DC08CS distribution panel allowed connection to telegraph and Telex lines. |
| − | Lines could be connected to [[modem]]s, provided the correct line conditioning units were installed, but modem control required a [[DM11-BB Modem Control Option]] | + | Lines could be connected to [[modem]]s, provided the correct line conditioning units were installed, but modem control required a [[DM11-BB Modem Control Option]], mounted in the main DM11 backplane along with the rest of the DM11 cards, and connected to the distribution panel via other flat cables which carried the modem control signals. The DM11-BB is logically a separate device from the DM11-AA, albeit one housed in the DM11 backplane. |
The line parameters: | The line parameters: | ||
| − | * [[baud rate]]s (ranging from | + | * [[baud rate]]s (ranging from 45 to 1200) |
* character length (5-8 bits) | * character length (5-8 bits) | ||
* output stop bits (1 or 2) | * output stop bits (1 or 2) | ||
| − | were the same for all lines, and set by [[jumper]]s. | + | were the same for all lines, and set by [[jumper]]s; parity was computed on incoming data. A 'break' condition on the line (i.e. continuous assertion) could also be generated and detected. |
| − | |||
| − | A 'break' condition on the line (i.e. continuous assertion) could also be generated and detected. | ||
==DM11-AA Device registers== | ==DM11-AA Device registers== | ||
| Line 40: | Line 38: | ||
|} | |} | ||
| − | The | + | The addresses shown are for the first DM11-AA11 in a system; additional ones (up to 16 total) are normally set to be at 775010, 775020, etc to 775170. |
| + | |||
| + | ===775000: Status Register (DMCSR)=== | ||
| + | {{16bit-header}} | ||
| + | | TINT || TO || OVR || TIE || colspan=4 | Unused || DONE || RIE || colspan=2 | MEMEX || Unused || MAINT || FHD || RENB | ||
| + | {{16bitoctal-bitout}} | ||
| + | |||
| + | The Base Address Register is 8 bits wide, so the in-memory tables must start on a 0400 boundary. | ||
| + | |||
| + | ==Memory tables== | ||
| + | |||
| + | The four tables of per-line data kept in main memory were: | ||
| + | |||
| + | {| border=1 | ||
| + | ! Table !! Offset (in [[byte]]s) !! Size (in bytes) | ||
| + | |- | ||
| + | |Current Address || 0 || 32 | ||
| + | |- | ||
| + | |Word Count || 040 || 32 | ||
| + | |- | ||
| + | |Bit Assembly || 0100 || 32 | ||
| + | |- | ||
| + | |Circular Buffer || 0200 || 128 | ||
| + | |} | ||
| + | |||
| + | The first two are for transmitting, the last two for receiving. The format of the entries in the buffer is: | ||
| + | {{16bit-header}} | ||
| + | | Valid || Break || Parity || colspan="4" | Channel || Unused || colspan="8" style="text-align:center;" | Character | ||
| + | {{16bitoctal-bitout}} | ||
| + | |||
| + | The input character, which may be less than 8 bits wide, is stored right-justified. | ||
==Implementation== | ==Implementation== | ||
| − | The DM11-AA boards (all [[DEC card form factor|quad]], except for the Control C, which is a dual) plugged into the DM11 backplane are: | + | The DM11-AA boards (all [[DEC card form factor|quad]], except for the Control C, which is a dual) which plugged into the DM11 backplane are: |
* M7240 - Control A | * M7240 - Control A | ||
Revision as of 13:32, 2 October 2019
The DM11 asynchronous serial line interface was a very early UNIBUS peripheral which provided up to 16 asynchronous serial line connections. It was in some sense a predecessor to the DH11, in that it used DMA.
However, unlike any other UNIBUS peripheral, much of its internal state was actually stored in main memory, with DMA used to gain access to it, not in registers in the device itself. (Apparently this was early enough in time that gates for registers were too expensive.) The data stored in memory included:
- per-line current output buffer address
- per-line current output transfer length
- per-line input shift registers
- input buffer (a circular FIFO buffer)
The 64-character FIFO buffer made input over-runs unlikely. There were separate receive and transmit interrupts, and half-duplex and full-duplex operation are supported in hardware.
The implementation of the basic DM11-AA used a double custom system unit backplane, containing multiple cards; a flat cable connected this to separate rack-mounted dual-height 'distribution panel' backplane (which required its own independent power supply).
Modular 'line conditioning' units from the DF11 Communications Line Adapter series were installed in the distribution panel to allow support of either 20mA or EIA RS-232 serial lines. The DC08CS distribution panel allowed connection to telegraph and Telex lines.
Lines could be connected to modems, provided the correct line conditioning units were installed, but modem control required a DM11-BB Modem Control Option, mounted in the main DM11 backplane along with the rest of the DM11 cards, and connected to the distribution panel via other flat cables which carried the modem control signals. The DM11-BB is logically a separate device from the DM11-AA, albeit one housed in the DM11 backplane.
The line parameters:
- baud rates (ranging from 45 to 1200)
- character length (5-8 bits)
- output stop bits (1 or 2)
were the same for all lines, and set by jumpers; parity was computed on incoming data. A 'break' condition on the line (i.e. continuous assertion) could also be generated and detected.
Contents
DM11-AA Device registers
| Register | Abbreviation | Address |
|---|---|---|
| Status Register | DMCSR | 775000 |
| Buffer Active Register | DMBAR | 775002 |
| Break Status Register | DMBSR | 775004 |
| Base Address Register | DMBADR | 775006 |
The addresses shown are for the first DM11-AA11 in a system; additional ones (up to 16 total) are normally set to be at 775010, 775020, etc to 775170.
775000: Status Register (DMCSR)
| TINT | TO | OVR | TIE | Unused | DONE | RIE | MEMEX | Unused | MAINT | FHD | RENB | ||||
| 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
The Base Address Register is 8 bits wide, so the in-memory tables must start on a 0400 boundary.
Memory tables
The four tables of per-line data kept in main memory were:
| Table | Offset (in bytes) | Size (in bytes) |
|---|---|---|
| Current Address | 0 | 32 |
| Word Count | 040 | 32 |
| Bit Assembly | 0100 | 32 |
| Circular Buffer | 0200 | 128 |
The first two are for transmitting, the last two for receiving. The format of the entries in the buffer is:
| Valid | Break | Parity | Channel | Unused | Character | ||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
The input character, which may be less than 8 bits wide, is stored right-justified.
Implementation
The DM11-AA boards (all quad, except for the Control C, which is a dual) which plugged into the DM11 backplane are:
- M7240 - Control A
- M7241 - Control B
- M7242 - Control C
- M7243 - Transmitter D
- M7244 - Transmitter E
- M7244 - Receiver
and 4 single-width, non-DM11-specific cards:
Board locations (as seen from the board insertion side of the backplane, not the wire-wrap pin side, as is common in DEC documentation) are:
| Connector | ||||||
|---|---|---|---|---|---|---|
| Slot | A | B | C | D | E | F |
| 1 | UNIBUS In | M7240 | ||||
| 2 | M105 | M7241 | ||||
| 3 | Power | M405 | M782 | M782 | M7242 | |
| 4 | M974 Cable | M7245 | ||||
| 1 | M7244 | |||||
| 2 | M7243 | |||||
| 3 | Power | Reserved for DM11-BB | ||||
| 4 | UNIBUS Out | Reserved for DM11-BB | ||||
Power comes in on a single-width stub card in the A3 slots (as is canonical in the PDP-11/20 generation of PDP-11s).
