Difference between revisions of "DHU11 asynchronous serial line interface"
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Revision as of 14:22, 1 January 2021
The DHU11 asynchronous serial line interface was a replacement for the UNIBUS DH11. It was not programmatically exactly identical to the DH11, but had all the same basic capabilities: it provided 16 RS-232 asynchronous serial lines, and output used DMA.
The reasons for the replacement of the DH11 are not known, but likely the major one was cost: the DH11 consisted of an entire double system unit backplane, containing multiple cards; the DHU11 was a single card. It had some minor improvements over the DH11 (including a fix for its silo problem), but they seem not significant enough by themselves to warrant its replacement. They included:
- input used a 256-character FIFO buffer (somewhat larger than the original DH11's 64-character one);
- the DHU11 includes several microprocessors, and has extended capabilities, including a diagnostic self-test, and flow control support;
- the DHU11 has the ability to transmit under program control; each line has a 64-character FIFO output buffer.
Contents
Implementation
Physically, the DHV11 consisted of a single hex card, the M3105, which plugged into a MUD slot. It connected to a pair of H3029 distribution panels (8 lines each) via BC05L flat cables, two per distribution panel; the BC05L connects to a 40-pin Berg header on each end. The H3029 contains eight male DB-25 connectors (DB-25P).
Device registers
The registers in the DHU11 are somewhat different from those in the DH11:
- it was intended to be program compatible with its QBUS equivalents (the DHV11; and later the DHQ11, which could be set to exactly emulate the DHU11), and since the QBUS has a larger address space than the UNIBUS, it needed two word-sized registers to hold the output buffer address;
- the previously mentioned improvements.
Register | Abbreviation | Address |
---|---|---|
Control and Status Register | CSR | 760020 |
Receive Buffer Register | RBUF | 760022 |
Receive Timer Register* | RXT | 760022 |
Line Parameter Register | LPR | 760024 |
Transmit FIFO Data Register | TFD | 760026 |
Transmit FIFO Size Register* | TFS | 760026 |
Line Status Register* | STAT | 760027 |
Line Control Register | CTRL | 760030 |
Transmit Buffer Address Register Low | TBADL | 760032 |
Transmit Buffer Address Register Hi | TBADH | 760034 |
Transmit Buffer Count Register | TBCT | 760036 |
Registers marked with a '*' are byte width; the others are all word-width. The RBUF and RXT share an address, as do the TFD and TFS: the RBUF is read only, and the RXT is write only; the TFD is write only, and the TFS and STAT are read only. The LPR through TBCT are replicated, with one for each line in the device; the 'Line' field in the CSR indicates which one is currently available.
The addresses shown are for the first DHU11 in a system; additional ones are normally set to be at 760040, 760060, etc.
Control and Status Register (CSR)
TXA | TXIE | DF | TDE | Tx Line | RDA | RXIE | MR | SKIP | Line | ||||||
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
- TXA - Transmitter Action
- TXIE - Transmit Interrupt Enable
- DF - Diagnostic Fail
- TDE - Transmit DMA Error
- Tx Line - Line which set TXA
- RDA - Received Data Available
- RXIE - Receiver Interrupt Enable
- MR - Master Reset
- SKIP - Skip Self-Test
- Line - Select LPR through TBCT
Line Parameter Register (LPR)
TSpeed | RSpeed | STOP | EVEN | PARE | CLEN | DICD | Unused | ||||||||
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
Line Status Register (STAT)
DSR | Unused | RI | DCD | CTS | Unused | DHU | Not Present | ||||||||
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
Line Control Register (CTRL)
Unused | RTS | Unused | DTR | LTYP | MAINT | FXOFF | OAUTO | BREAK | RXE | IAF | TXA | ||||
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
Further reading
- DHU11 User Guide, EK-DHV11-UG-001