PDP-8/L: Difference between revisions

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* The -8/L used a positive I/0 bus, not negative
* The -8/L used a positive I/0 bus, not negative
* The -8/L was not pre-wired for a number of devices
* The -8/L was not pre-wired for a number of devices
* The -8/L could not accomodate the Extended Arithmetic Element
* The -8/L could not accomodate the [[Extended Arithmetic Element]]
* The -8/L supported a maximum of 8KW of [[main memory]]
* The -8/L supported a maximum of 8KW of [[main memory]]


Line 35: Line 35:


* DW08-A Negative I/O Bus Interface, to allow use of older PDP-8 devices
* DW08-A Negative I/O Bus Interface, to allow use of older PDP-8 devices
* MC-8/L Memory Extension Control, which was needed to support more than 4K [[word]]s of memory
* MC-8/L Memory Extension Control, [[bank switching]] needed to support more than 4K [[word]]s of memory
* MP-8/L Memory Parity
* MP-8/L Memory [[Parity]]


It could perform an addition to the [[accumulator]] in 3.2 µseconds, and a subtraction in 6.4 µseconds.
It could perform an addition to the [[accumulator]] in 3.2 µseconds, and a subtraction in 6.4 µseconds.
==External links==
* [http://www.bitsavers.org/pdf/dec/pdp8l PDP-8/L] - Original PDP-8/L documents


{{Nav PDP-8}}
{{Nav PDP-8}}


[[Category: PDP-8s]]
[[Category: PDP-8s]]

Revision as of 01:01, 16 May 2021


PDP-8/L

PDP-8/L from an ICS Astrotype system
Year Introduced: 1968
Form Factor: minicomputer
Word Size: 12
Logic Type: TTL
Design Type: clocked random logic
Clock Speed: 312KHz
Memory Speed: 1.6 µseconds
Physical Address Size: 8KW (requires optional MC-8/L)
Virtual Address Size: 4KW
Memory Management: none
Bus Architecture: positive logic I/O bus
Operating System: TSS/8
Predecessor(s): PDP-8/I
Successor(s): PDP-8/E


The PDP-8/L was a effectively a cost-reduced version of the PDP-8/I in the PDP-8 line; it apparently had the same CPU as the -8/I.

The primary differences between the two are:

  • The -8/L was slightly slower
  • The -8/L used a positive I/0 bus, not negative
  • The -8/L was not pre-wired for a number of devices
  • The -8/L could not accomodate the Extended Arithmetic Element
  • The -8/L supported a maximum of 8KW of main memory

Options for the -8/L included:

  • DW08-A Negative I/O Bus Interface, to allow use of older PDP-8 devices
  • MC-8/L Memory Extension Control, bank switching needed to support more than 4K words of memory
  • MP-8/L Memory Parity

It could perform an addition to the accumulator in 3.2 µseconds, and a subtraction in 6.4 µseconds.

External links

  • PDP-8/L - Original PDP-8/L documents