Difference between revisions of "M7850 parity controller"
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Revision as of 01:03, 2 April 2022
The M7850 parity controller is an optional accessory for mid-period main memory on the UNIBUS; it provides byte parity for memory units (such as the MM11-D core memory and MS11 32KB MOS memory) which i) provide the two extra bits of memory per PDP-11 word needed to hold the parity, and ii) are set up to interact with the M7850. It works with both core memory and MOS DRAM memory.
The M7850 is a dual format card, which plus into the two top (AB) sections of the MUD backplane into which the associated memory unit(s) are plugged. One M7850 can provide parity support to as many memory units as the backplane holds.
See also
External links
- M7850 parity controller maintenance manual (EK-M7850-MM-001)
- 11/34 Vol. 2 Field Maintenance Print Set - the M7850 is covered on pp. 93-95 of the PDF
